Reads like pedantic semantics. If TPL have singled out ``clocking`` as a patent violation and given representative examples for the family of chips in violation, it would appear that NEC have come back arguing chip design rather than the actual clocking violation eg 8 wires on this one, none on that, completely ignoring the clock.

I await the rebuttal to NEC`s rejoinder with even more confidence as to the outcome.

Be well