intel variable speed clocking. if you look this up you will see that intel has openly used variable speed clocking on their processors. funny they never claimed to have invented it . or patent it. then suddenly in 1999 they developed what they call speed step. which is the same basic thing. and they say they developed this . no claim of a patent to protect this key fundamental processing that is the heart of all their processors. we know why. and they do also. ptsc had a patent pending on this tech. for years it got held up for ever in legal battles and the patent office dragging their feet. i don't think intel ever thought that ptsc would ever get this patent awarded to them. intel has been sued many times before for infringement and has lost in court and also settled cases, out of court. how about someone doing a little homework on patents and see what intel holds. all these big company's love to steal tech. microsoft is the biggest thief. good luck to all longs. Funny indeed, Intel cannot patent it because it already belongs to Patriot Scientific # 5,809,336, otherwise...you know they would have. Hell, I think the only entities that have more patents are IBM and GOD. So, I decided to take elkman1310's advice and look it up for myself. Due Diligence; when searching for information I almost always hit a dead end, but every so often I come across a find that makes it all worth while. I ran a search on the very title of PTSC's patent 5,809,336 "High Performance Microprocessor Having Variable Speed System Clock." Low and behold, among the returns were a couple of very old sites (1996 - one year after PTSC filled for patent 5,809,336) by ARM (Advanced RISC Machines Ltd) and Digital Semiconductor -- development collaborators of Intel (among many others). In the text it goes on to describe features and functions of this NEW Intel StrongARM SA-110 Microprocessor, the FIRST member of the StrongARM family of high performance, low power microprocessors, the very foundation in which most of their microprocessors are built today. (registered trademarked - NOT patented) When I first read this information, after I had read PTSC's patent, I swear, it gave me goosebumps -- the best goosebumps I've ever had. There are many notable correlation's, one I particularly like is: excerpt from Intel StrongARM SA 110 Datasheet 1996 --"Clocks --The SA-110 receives 3.68-MHz clock from a crystal based clock generator. The SA-110 uses an internal phase-locked loop (PLL) to multiply the frequency by a veriable multiplier to produce a high speed clock. The high speed clock is then divided internally by a configureable ratio to provide a system clock for synchronous operation. The 3.68MHz oscillator and PLL run constantly in normal and idle mode." Note -- the header for "Clocks" is plural and the clock is "divided" to create a second clock for synchronous operation. Excerpts from PTSC's U.S. Patent 5,809,336 1995 --"A high performance, low cost microprocessor system having a variable speed system clock is disclosed herein. The microprocessor system includes an integrated circuit having a central processing unit and a ring oscillator variable speed system clock for clocking the microprocessor. The central processing unit and ring oscillator variable speed system clock each include a plurality of electronic devices of like type, which allows the central processing unit to operate at a variable processing frequency dependent upon a variable speed of the ring oscillator variable speed system clock. The microprocessor system may also include an input/output interface connected to exchange coupling control signals, address and data with the central processing unit. The input/output interface is independently clocked by a second clock connected thereto." & "Most microprocessors derive all system timing from a single clock. The disadvantage is that different parts of the system can slow all operations. The microprocessor 50 provides a dual-clock scheme as shown in FIG. 17, with the CPU 70 operating a synchronously to I/O interface 432 forming part of memory controller 118 (FIG. 2) and the I/O interface 432 operating synchronously with the external world of memory and I/O devices. The CPU 70 executes at the fastest speed possible using the adaptive ring counter clock 430. Speed may vary by a factor of four depending upon temperature, voltage, and process. The external world must be synchronized to the microprocessor 50 for operations such as video display updating and disc drive reading and writing. This synchronization is performed by the I/O interface 432, speed of which is controlled by a conventional crystal clock 434 Excerpt from Intel/ARM/Digital SA-110 Datasheet -- "The Digital Semiconductor 110-SA microprocessor (SA-110) is the first member of the StrongARM family of high-performance, low power microprocessors. The SA-110 is the latest implementation of advanced RISC Machines Ltd. (ARM) Version 4 architecture and offers significant advances in microprocessor design. The SA-110 has been designed to further extend the ARM family as the worlds leading source of low power, high performance RISC processors for embedded consumer markets such as smart hand held devices and interactive digital video. The SA-110 is a general purpose, 32-bit microprocessor with a 16KB instruction cache (Icache); a 16KB, write-back data cache (Dcache); a write buffer; and a memory management unit (MMU) combined in a single chip" Excerpt PTSC Patent -- "DETAILED DESCRIPTION OF THE INVENTION Overview The microprocessor of this invention is desirably implemented as a 32-bit microprocessor optimized for: HIGH EXECUTION SPEED, and LOW SYSTEM COST. In this embodiment, the microprocessor can be thought of as 20 MIPS (million instructions per second) for 20 dollars. Important distinguishing features of the microprocessor are: Uses low-cost commodity DYNAMIC RAMS to run 20 MIPS 4 instruction fetch per memory cycle On-chip fast page-mode memory management Runs fast without external cache Requires few interfacing chips Crams 32-bit CPU in 44 pin SOJ package The instruction set is organized so that most operations can be specified with 8-bit instructions. Two positive products of this philosophy are: Programs are smaller, Programs can execute much faster. The bottleneck in most computer systems is the memory bus. The bus is used to fetch instructions and fetch and store data. The ability to fetch four instructions in a single memory bus cycle significantly increases the bus availability to handle data. ...Another excerpt of great interest --"More recently, it has been perceived that performance gains can be achieved through comparative simplicity, both in the microprocessor integrated circuit itself and in its instruction set. This second approach provides RISC microprocessors, and is exemplified by the Sun SPARC and the Intel 8960 microprocessors. However, even with this approach as conventionally practiced, the packages for the microprocessor are large, in order to accommodate the large number of pinouts that continue to be employed. A need therefore remains for further simplification of high performance microprocessors." I invite you to browse through PTSC's IP Portfolio, paying special attention to # 5,809,336 -- http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=/netahtml/search-bool.h..."patriot+scientific"&RS="patriot+scientific" ... And then Intel's SA-110 Datasheets -- http://www.renan.org/ARM/doc/sa110pb.pdf -- On this next one, click on the icon of the largest paper with folded corner. -- http://developer.intel.com/design/strong/datashts/27823001.pdf Some of Intel's products today (Any features sound familiar?) -- http://www.intel.com/design/iio/index.htm?iid=ipp_embed_proc+prod_iop& http://www.intel.com/design/pca/prodbref/252780.htm A bit of History -- June 23, 1996 Source: Bruce V. Bigelow -- You might say Woody Norris is waiting for his chip to come in.Nine years ago, the Poway inventor founded Patriot Scientific to develop his idea for a ground-penetrating radar that could be used to identify subterranean features from an aircraft. Theoretically, such a radar could be used to search for everything from deep-underground oil fields and mineral deposits to buried structures, utilities and even land mines just beneath the surface. Now a proprietary microprocessor that Patriot acquired for its radar two years ago could take the little startup company in a whole new direction.Norris, 57, says the high-speed microprocessor--named "ShBoom" after a 1954 jukebox tune--is perfect for running Java, an innovative programming language for the Internet designed by Sun Microsystems."The chip fits with Java like this," Norris says, holding aloft his hands with fingers dovetailed.On Wall Street, investors have likewise embraced the idea.On May 17, the price of stock in Patriot Scientific hit a record $4.03 per share on the Nasdaq electronic exchange--almost 26 times its year-ago price of 15 cents per share. Last week, the stock hovered at about $3 trading on an average volume of roughly 230,000 shares a day. Yet, the ShBoom processor's compatibility with Java was completely unforeseen--and unintended.'A bluebird'"One of my partners would refer to this as 'a bluebird,'" says Willis E. Higgins, a Palo Alto patent attorney who represents Patriot. "It's something that just comes along. A stroke of luck."The ShBoom processor was conceived more than a decade ago by Charles Moore, who invented the "Fourth" programming language for computers, and Russell H. Fish III, a computer consultant and chip designer.After years of working on the project, Fish and Moore sold all rights to the ShBoom processor to the late Helmut Falk, a Romanian-born engineer who co-founded DH Technology, a high-technology printer manufacturer now based in San Diego.By several accounts, Falk poured millions of dollars into improving the ShBoom design through NanoTronics, his wholly owned company based in Eagle Point, Ore.Falk was not known among executives at San Diego electronic firms. But business partners described him as a savvy businessman and world traveler who owned estates in San Diego, Oregon, Costa Rica, Switzerland, Florida and Puerto Rico. He spoke German, French, Italian, Spanish and English.In 1994, NanoTronics merged with Patriot in a deal intended to combine Norris' radar technology with Falk's high-speed processor."We liked the idea of pairing the chip with the radar," Norris recalls.As part of the deal, Falk received 10 million shares of Patriot's stock and took over as Patriot's chairman and chief executive. Norris, who also founded Norris Communications and American Technology, says he was happy to withdraw from Patriot's day-to-day operations.Then, Falk died unexpectedly of cancer last July 6."I talked to him a few weeks before he died, and he said he really wanted to develop this chip," says Don Hebert, who co-founded DH Technology with Falk. "He thought it was going to be a hot-shot thing that nobody else had." IMHO -- He was right. It's just that nobody wanted to pay for it. Moore & Fish knew what they had and wrote the text body of U.S. Patent 5,809,336 in great detail, leaving no stone unturned and closing all loopholes to the best of their knowledge. Intel tried to skirt around this patent by using the pipeline technique for instruction set rather than PTSC's stack approach, yet they did use PTSC's high performance, low cost microprocessor system having a variable speed system clock. Without this fundamental element clearly patented by PTSC long before Intel or anybody else used it, there simply would not be RISC microprocessors operating above 110MHz today. That is, other than Patriots Ignite family of microprosessors. I am not an attorney or a computer scientist, but I can discern the obvious. In light of what I have seen, no Judge will stop this case from being heard, and no jury could possibly deny the truth to PTSC's claims. There has been talk of the application and interpretation of PTSC's IP as being possibly "too broad." From what I have seen PTSC's IP has not only been infringed upon; this is a case of blatant, willful, contemplated, deliberate, DEAD NUTS grand theft. Violated on so many levels, in the highest degree. It is sad commentary of ethics in big business today when willful infringement is seen as good business. You know whatever all these collective companies pay out in damages and future royalties will not even come close to the total figure that PTSC would have realized if they rightfully received licensing fees and royalties from the beginning. The bottom line is, despite being sued, paying future royalties, court costs and legal fees...these companies still come out ahead, and they knew it from the start. The only thing that is "too broad" about this case is the level of sheer size and scope that PTSC's IP has been violated. The six companies currently standing in as defendants are just the tip of the iceberg. there will be more to come -- IBM, Motorola, AMD the list goes on and on. That could change of course if these companies start coming forward with settlements to avert costs associated with litigation and possibly gain better licensing deals from PTSC for products they already sell. I can see why the PTSC's legal team is working on contingency and seeking treble or triple damages for willful, intentional infringement. I encourage all of those who are considering buying in, or who are already in and planning on selling out on a mere double or triple to disregard my opinion and objectively compare PTSC's patents and the fundamental building platform in which Intel and much of the industry has developed their current line of microprocessors, and if you come to the same conclusion as have I and decide to go deep for the long bomb, then I will take the liberty to quote a poster from another board ... "you can thank me later" More on Charles Moore: The founding father of the "Fourth programming language for computers" and CO-inventor Patent 5,809,336 -- Thanx to Incite & elkman1310 for the DD