In bold:

VI. CONCLUSION
For the foregoing reasons, defendants respectfully request that the Court deny TPL’s motion to amend its infringement contentions. Simply pointing to an on-chip clock generator, a connection of an external crystal to plus and minus pins, or a PLL, cannot be sufficient because those structures all existed in prior art, including prior art that TPL explicitly argued did not contain an entire on-chip ring oscillator. See, e.g., Ex. CC at 4 [‘336 File History, 7/7/97 Amendment] <B>(distinguishing Magar prior art reference that disclosed an external crystal across plus and minus pins connected to on-chip clock generator).</B>

Moore says:

The central processing unit and ring oscillator variable speed system clock each include a plurality of electronic devices of like type, which allows the central processing unit to operate at a variable processing frequency dependent upon a variable speed of the ring oscillator variable speed system clock. The microprocessor system may also include an input/output interface connected to exchange coupling control signals, address and data with the central processing unit. The input/output interface is independently clocked by a second clock connected thereto.

I don't see where Hagar patent fits in here. IMO the "ring oscillator variable speed system clock" is what the patent and increased speed is all about.

What is the "on chip clock generator" of the Hagar patent?