I've talked (in ignorance) about this before, and it seems that the defendants were arguing about "groupedness", and suggesting that since this patent only has to do with fetching multiple instructions in group, it negates the ability to be useful when fetching a single instruction.

Today, I found this interesting (to our benefit) in Despains testomony:

"37. The improvements relate to techniques that can reduce the average size of the instructions, that is, the number of bits needed to tell the processor what to do. First, instead of fetching one instruction at a time into the instruction register, the processor disclosed in the '584 patent fetches an "instruction group" that can include multiple instructions. Fetching multiple instructions at once means the processor can do more work before it needs another group of instructions, allowing the slower memory more time to retrieve the next group."

Specifically: ".... the processor disclosed in the '584 patent fetches an "instruction group" that can include multiple instructions." Note he says "can", not "must". That is his interpretation based on the language of the patents. With my acknowledged ignorance, IMO "groupedness" is not even an issue based on Despain's interpretation.

Don't KNOW if this helps - just my take on it.

SGE