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Message: ARM cores excluded from MMP patent trial

ARM cores excluded from MMP patent trial

posted on Sep 14, 2007 11:42AM
ARM cores excluded from MMP patent trial

Peter Clarke
(09/14/2007 10:51 AM EDT)
URL: http://www.eetimes.com/showArticle.j...
LONDON — Core families belonging to microprocessor technology licensor ARM Holdings plc (Cambridge, England) have been deemed non-infringing and granted exclusion from a Moore Microprocessor Patent Portfolio (MMP) infringement trial in the U.S. District Court in the Eastern District of Texas.

As a result ARM is removed as an "intervener" in the trial, according to the TPL Group. The move was announced by TPL as part the granting of its motion to simplify and streamline the trial. However, TPL said it can appeal the non-infringement ruling immediately rather than waiting for the end of the trial. Another consequence of the motion is that the trial is set to focus on just two patents in the MMP portfolio.

TPL said the partial judgment of non-infringement on certain products stipulates the following:

"The 'instruction groups' elements of the accused claim of US Patent 5,784,584 (US '584) is deemed non-infringed for the purpose of this trial, based on the Court's claim interpretation, thereby allowing appeal from this claim interpretation ruling to be initiated immediately, rather than waiting until the end of trial.

All accused ARM core families (ARM7, ARM9, ARM9E, ARM10E, ARM11), as well as the ARM Cortex microprocessor core family, are deemed non-infringed under the Court's claim interpretation of 'instruction groups,' thereby removing ARM as an intervener in the Texas Court trial."

To speed up the trial process TPL has also sought to get selected semiconductor devices to represent groups or families of chips and/or end user products. And TPL has also sought a continuance of the trial to January 2008, thereby allowing 60 more days for additional discovery time.

As a result of these approved moves initiated by TPL, the trial will focus on two U.S. patents in the MMP Portfolio (5,809,336 and 6,598,148).

Commenting on the proposed partial judgment relative to US '584, Leckrone said, "We continue to believe that the claim construction for 'instruction groups' deserves more scrutiny than the Court could give it during the Markman hearing due to time and space constraints. While the proposed partial judgment we are seeking agrees to a judgment of non-infringement on this claim construction for the Texas Court trial, it will allow us to seek reversal of this interpretation in the US Court of Appeals for the Federal Circuit immediately. Otherwise, TPL would have had to wait for the end of the Texas Court trial in order to have the interpretation reviewed by the Court of Appeals."

TPL Group, which works with Patriot Scientific Corp., has signed up Intel Corp. and Advanced Micro Devices Inc. and numerous end-user product producers to license the MMP. Since January 2006, HP, Casio, Fujitsu, Sony, Nikon, Seiko Epson, Pentax, Olympus, Kenwood, Agilent, Lexmark, Schneider Electric, NEC Corp., Funai Electric, SanDisk, Sharp Corp., Nokia, Bull, Lego Group, and Denso Wave have all purchased MMP Portfolio licenses. TPL formed an alliance with Patriot Scientific Corp. in 2005 and pooled processor technology patents together to create what they call the Moore Microprocessor Patent (MMP) portfolio, named after Charles H. Moore, chief technology officer of TPL Group, who is credited with inventing the Forth software programming language and is known for his work in the 1980s on stack-based microprocessors.

The MMP portfolio includes seven U.S. patents, as well as their European and Japanese counterparts, which Patriot (San Diego, Calif,) and TPL Group (Cupertino, Calif.) have said they consider fundamental to the design of modern microprocessors, microcontrollers and system-on-chip devices. Three of the patents are: U.S. Patent 5,809,336, which covers the separate clocking of a CPU and its I/O; U.S. Patent 6,598,148, which covers the use of multiple cores and embedded memory; and U.S. Patent 5,784,584, which covers fetching multiple instructions.

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