Re: Moore refers to Thaden dated May 1987

I did some research again today and traced the Thaden references. Here is another long post. The question of why 5440749 cited Thaden but not 5809336 may well be the relevant factors and citing are done by PTO, not by inventors. Inventors make reference either in specification (some in Background of Information) or submit the IDS (Information Disclosure Statement) to PTO. The main thing here is that both 336 and 749 were originated from same application and had the same examiner. Accusations from PUBPAT only look good on the surface. I hope everyone can see the ugly part after connecting all dots.

Good luck to all.

Some short hands -

Comment # – my analysis and opinion
336 –U.S. Patent No. 5,809,336 to Charles H. Moore et al.
749 - U.S. Patent No. 5,440,749 to Charles H. Moore et al.
155 - U.S. Patent No. 4,660,155 to Thaden, et al. (“Thaden”)
495 - U.S. Patent No. 4,665,495 to Thaden, et al. (“Thaden”)
PUBPAT – PUBPAT Reexamination request to USPTO to invalidate 336 Patent.

Comment #1 - This is second part of the DD regarding PUBPAT Reexamination request to
USPTO to invalidate 336 Patent. Today I found more info that shows this request was written
without thorough DD, or perhaps it was produced in a hurry - no one can rule out that it has
nothing to do with the case in Texas with Markman hearing scheduled just a few month away.
PUBPAT asserted that 336 patent did not cited U.S. Patent No. 4,660,155 to Thaden, et al.
(“Thaden”) as reference of during the previous examination. This is true, but the story does
not end here. Following is their assertions -
====================================...

PUBPAT
H. A substantial new question of patentability as to claims 110 is raised by
Ledzius inlight of Thaden.U.S. Patent No. 4,660,155 to Thaden, et al. (“Thaden”), entitled
“Single Chip VideoSystem With Separate Clocks For Memory Controller, CRT Controller,”
was filed on July 23,1984 and issued on April 21, 1987. Thaden describes an interface between a
microprocessor andvideo circuitry, including memory. The reference was not cited during the
previous examinationand is prior art under 35 U.S.C. 102(b) and 103(a). Ledzius, with Thaden,
discloses all elements of the claims, including features not disclosed by any reference considered
during the previous examination, such as an oscillator, microprocessor and input/output interface on the
same IC with the interface clocked in part by the processor's clock and in part by an external clock.
Requester believes that a reasonable examiner would consider these teachings important in determining
whether claims 110 of the '336 patent are patentable, and they raise a substantial new question of
patentability with respect to claims 110.

====== end PUBPAT =========================
Comment #2 - Bellow are some info from USPTO database about the 366 patent. Please note the
following items -
Related U.S. Patent Documents
Application Number Filing Date Patent Number Issue Date
389334 Aug., 1989 5440749
CROSS REFERENCE TO RELATED APPLICATIONS
This application is a division of U.S. application Ser. No. 07/389,334,
filed Aug. 3, 1989, now U.S. Pat. No. 5,440,749.
In short, 336 and 749 patents are brothers, their parent is U.S. application Ser. No. 07/389,334.
The reason is that U.S. application Ser. No. 07/389,334 contain more than one inventions, but the
law restricts one patent for one invention only to pay for one set of fees. 749 patent was issued on
August 8, 1995 and 336 patent was issued on September 15, 1998, more than 3 years later then749 patent.

============================
336

Related U.S. Patent Documents
------------------------------------...
Application Number Filing Date Patent Number Issue Date
389334 Aug., 1989 5440749
------------------------------------...

Current U.S. Class: 710/25
Current International Class: G06F 7/76 (20060101); G06F 7/48 (20060101); G06F 12/08 (20060101);
G06F 7/78 (20060101); G06F 9/30 (20060101); G06F 9/32 (20060101); G06F 15/76 (20060101);
G06F 15/78 (20060101); G06F 7/52 (20060101); G06F 9/38 (20060101); G06F 7/58 (20060101)
Field of Search: 395/500,551,555,845

------------------------------------...
References Cited [Referenced By]
------------------------------------...

U.S. Patent Documents

3967104 June 1976 Brantingham
3980993 September 1976 Bredart et al.
4003028 January 1977 Bennett et al.
4042972 August 1977 Gruner et al.
4050096 September 1977 Bennett
4112490 September 1978 Pohlman et al.
4315308 February 1982 Jackson
4338675 July 1982 Palmer
4398265 August 1983 Puhl et al.
4453229 June 1984 Schaire
4503500 March 1985 Magan
4539655 September 1985 Trussell et al.
4553201 November 1985 Pollack
4627082 December 1986 Pelgrom et al.
4670837 June 1987 Sheets
4680698 July 1987 Edwards et al.
4761763 August 1988 Hicks
5414862 May 1995 Suzuki et al.

Primary Examiner: Eng; David Y.
Attorney, Agent or Firm: Cooley Godward LLP

------------------------------------...
Parent Case Text
------------------------------------...

CROSS REFERENCE TO RELATED APPLICATIONS

This application is a division of U.S. application Ser. No. 07/389,334, filed Aug. 3, 1989, now U.S. Pat. No. 5,440,749.

========= end 366 ===========

Comment #3 - Bellow are some info from USPTO database about the 749 patent. Please note the
following reference cited by 749 patent -
4665495 May 1987 Thaden
Remember in PUBPAT request, the item H state - "H. A substantial new question of patentability as
to claims 110 is raised by Ledzius inlight of Thaden.U.S. Patent No. 4,660,155 to Thaden, et al.
(“Thaden”), ". So both patent 115 and 495 patents have a same inventor Thaden. 749 patent
did not cite 155 as a reference, but cite 495 instead. It turns out 155 and 495 are like brothers also.

====================

749
United States Patent 5,440,749
Moore , et al. August 8, 1995

------------------------------------...
High performance, low cost microprocessor architecture

Abstract
A microprocessor (50) includes a main central processing unit (CPU) (70) and a separate
direct memory access (DMA) CPU (72) in a single integrated circuit making up the
microprocessor (50). The main CPU (70) has a first 16 deep push down tack (74),
which has a to item register (76) and a next item register (78), respectively connected
to provide inputs to an arithmetic logic unit (ALU) (80) by lines (82) and (84). An
output of the ALU (80) is connected to the top item register at (82) is also connected
by line (88) to an internal data bus (90). CPU (70) is pipeline free. The simplified
CPU (70) requires fewer transistors to implement than pipelined architectures,
yet produces performance which matches or exceeds existing techniques. The
DMA CPU (72) provides inputs to the memory controller (118) on line (148).
The memory controller (118) is connected to a RAM by address/data bus (150) and
control lines (152). The DMA CPU (72) enables the CPU (70) to execute instructions
four times faster than the RAM speed by fetching four instructions in a single memory cycle.

------------------------------------...
Inventors: Moore; Charles H. (Woodside, CA), Fish, III; Russell H. (Mt. View, CA)
Assignee: Nanotronics Corporation (Eagle Point, OR)

Appl. No.: 07/389,334
Filed: August 3, 1989

------------------------------------...

Current U.S. Class: 712/206
Current International Class: G06F 7/78 (20060101); G06F 12/08 (20060101); G06F 15/78 (20060101); G06F 15/76 (20060101); G06F 7/52 (20060101); G06F 7/76 (20060101); G06F 7/58 (20060101); G06F 9/32 (20060101); G06F 9/38 (20060101); G06F 7/48 (20060101); G06F 9/30 (20060101)
Field of Search:

References Cited [Referenced By]

------------------------------------...

U.S. Patent Documents


3603934 September 1971 Heath
4003033 January 1977 O'Keefe et al.
4037090 July 1977 Raymond
4042972 August 1977 Grunes et al.
4050058 September 1977 Garlic
4067059 January 1978 Derchak
4079455 March 1978 Ozga
4110822 August 1978 Porter
4125871 November 1978 Martin
4128873 December 1978 Lamiaux
4255785 March 1981 Chamberlin
4354228 October 1982 Moore et al.
4376977 March 1983 Brunshorst
4382279 May 1983 Mgon
4403303 September 1983 Howes et al.
4450519 May 1984 Guttag et al.
4463421 July 1984 Laws
4538239 August 1985 Magar
4541045 September 1985 Kromer
4562537 December 1985 Barnett et al.
4577282 March 1986 Caudel et al.
4607332 August 1986 Goldberg
4626988 December 1986 George et al.
4649471 March 1987 Briggs
4665495 May 1987 Thaden
4709329 November 1987 Hecker
4713749 December 1987 Magar et al.
4714994 December 1987 Oklobdzija et al.
4720812 January 1988 Kao et al.
4772888 September 1988 Kimura
4777591 October 1988 Chang et al.
4787032 November 1988 Culley et al.
4803621 February 1989 Kelly
4860198 August 1989 Takenaka
4870562 September 1989 Kimoto
4931986 June 1990 Daniel et al.
5036460 July 1991 Takahira
5070451 December 1991 Moore et al.
5127091 June 1992 Bonfarah

Other References
Intel 80386 Programmer's Reference Manual, 1986..

Primary Examiner: Eng; David Y.

========== end 749 =================

Comment #4 -
Bellow are info from USPTO database about 155 patent and 495 patent. Note 155 patent
was issued from Appl. No.: 06/633,388 and 495 was issued from Appl. No.: 06/633,384. looks
unrelated until you read the BACKGROUND OF INVENTION of each patent -

"This invention relates to electronic computer systems and the like, and more particularly relates to
improved methods and apparatus for achieving a video display having high resolution.
Related U.S. patent applications are: application Ser. No. 633,385 entitled "Video System Controller
with a Row Address Override Circuit" by Jeffrey C. Bond and Robert C. Thaden, application Ser.
No. 633,384 entitled "Single Chip DRAM Controller and CRT Controller" by Robert C. Thaden
and Jeffery C. Bond, application Ser. No. 633,386 entitled "Video Memory Controller" by Robert C.
Thaden, Jeffery C. Bond, James C. Moravec, Karl M. Guttag, Raymond Pinkham and Mark Novak, " ...
and a few more. Thaden and his co-inventors rapid filed 7 patent applications in a very short period and
patents issued are assigned to TI. Precisely speaking, 155 and 495 are cousins, not bothers, since
they are related (as inventor disclosed) to the same inventor and assignee and filed closely together.

===========================

155
Single chip video system with separate clocks for memory controller, CRT controller

Inventors: Thaden; Robert C. (Houston, TX), Bond; Jeffrey C. (Sugarland, TX)
Assignee: Texas Instruments Incorported (Dallas, TX)
Appl. No.: 06/633,388
Filed: July 23, 1984

Current U.S. Class: 345/10
Current International Class: G09G 5/393 (20060101); G09G 5/36 (20060101); G09G 1/16 (20060101)
Field of Search: 364/518,519,521,2MSFile,9MSFile 340/701,703,798,799

Abstract
A video system has a controller for controlling the transfer of data from a processor to a CRT monitor.
The controller has two clocks and a CRT interface for synchronously interfacing the controller to the
CRT monitor, a second interface for synchronously interfacing the controller to the processor. A first
clock source provides timing for the CRT interface and is in synch with the timing of the CRT monitor.
A second clock source provides timing for the processor interphase which is in synch with the timing of
the processor.

BACKGROUND OF INVENTION

This invention relates to electronic computer systems and the like, and more particularly relates to
improved methods and apparatus for achieving a video display having high resolution.

Related U.S. patent applications are: application Ser. No. 633,385 entitled "Video System Controller
with a Row Address Override Circuit" by Jeffrey C. Bond and Robert C. Thaden, application Ser.
No. 633,384 entitled "Single Chip DRAM Controller and CRT Controller" by Robert C. Thaden
and Jeffery C. Bond, application Ser. No. 633,386 entitled "Video Memory Controller" by Robert C.
Thaden, Jeffery C. Bond, James C. Moravec, Karl M. Guttag, Raymond Pinkham and Mark Novak,
application Ser. No. 633,367 entitled "State Machine Standard Cell" by Robert C. Thaden and Mark
W. Watts, application Ser. No. 633,389 entitled "X Y Addressing" by Karl M. Guttag, Jerry Van Aken,
Jeffery C. Bond, Rudy Albachten and Mark Novak, application Ser. No. 633,383 entitled
"Video System with Single Memory Space for Instructions, Program Data and Display Data"
by Karl M. Guttag, Raymond Pinkham and Mark Novak and application Ser. No. 633,387 entitled
"Video Memory Controller Support Storage of Data From an External Source" by
Jeffery C. Bond and Robert C. Thaden.

============= end 155 =======================

495
Single chip dram controller and CRT controller
Inventors: Thaden; Robert C. (Houston, TX)
Assignee: Texas Instruments Incorporated (Dallas, TX)
Appl. No.: 06/633,384
Filed: July 23, 1984
------------------------------------...

Current U.S. Class: 345/534 ; 345/565
Current International Class: G09G 5/36 (20060101); G09G 5/393 (20060101); G09G 1/16 (20060101)
Field of Search: 364/518-522,2MSFile,9MSFile 340/701,703,798,799

Abstract
A video memory and display (CRT) controller circuit on a single semiconductor substrate controls a
DRAM (dynamic random access memory) used as a video memory and a CRT display. The video
memory and display controller is normally a part of a video system which includes a data processor,
video memory and a CRT display. The video memory and display controller includes a row address
latch for storing a row address, a column address latch for storing a column address, display address
logic which generates row and column addresses for display update ad refresh logic which generates
row addresses for the required periodic DRAM refresh. A multiplexer provides the application of the
proper address to the address bus of the DRAM. The display controller circuit is responsive to the
data processor data bus for generating display control signals for control of the CRT display.

BACKGROUND OF INVENTION

This invention relates to electronic computer systems and the like, and more particularly relates to improved
methods and apparatus for achieving a video display having high resolution.

Related U.S. patent applications are: application Ser. No. 633,385 entitled "Video System Controller with a
Row Address Override Circuit" by Jeffrey C. Bond and Robert C. Thaden, application Ser. No. 633,386
entitled "Video Memory Controller" by Robert C. Thaden, Jeffrey C. Bond, James C. Moravec, Karl M. Guttag,
Raymond Pinkham and Mark Novak, application Ser. No. 633,367 entitled "State Machine Standard Cell"
by Robert C. Thaden and Mark W. Watts, application Ser. No. 633,389 entitled "X Y Addressing" by Karl
M. Guttag, Jerry Van Aken, Jeffrey C. Bond, Rudy Albachten and Mark Novak, application Ser. No. 633,383
entitled "Video System with Single Memory Space for Instructions, Program Data and Display Data" by
Karl M. Guttag, Raymond Pinkham and Mark Novak, application Ser. No. 633,388 entitled
"Single Chip Video System with Separate Clocks for Memory Controller and CRT Controller" by
Robert C. Thaden and Jeffrey C. Bond and application Ser. No. 633,387 entitled
"Video Memory Controller Support Storage of Data From an External Source"
by Jeffrey C. Bond and Robert C. Thaden.

=============== end 495 ======================

Comment #5 -
There is an important info I wait to the end to discuss. Careful reader may noticed it already : the 336 and 749
patents have the same examiner Eng; David Y. So, now we have to ask a few questions -
Examiner Eng prosecuted 749 patent first and 495 was cited in the reference. Is it possible for him -
A. Not knowing 495 and 155 are closely related cousins, and
B. Not knowing 155 are possible prior art for 749 when he prosecute 749 patent, and
C. Not knowing 155 are possible prior art for 366 (749's brother) when he prosecute 366 patent?
What I'm trying to say here is that the accusations from PUBPAT to say references were wrongly cited during the
previous examination may backfire. This may make PUBPAT look stupid from eyes of patent experts.
Another important info is the "Other References" cited "Intel 80386 Programmer's Reference Manual, 1986.."
as reference of 749 patent. Examiner have to know the in and out of Intel and other major macroprocessor vendors
prior arts before allowing the 336 and 749 patents. It shows the credibility of the examiner and PTO patent prosecution.
In light of Intel's technical advance of producing widely used 80386 microprocessor, 749 was granted patent, and 336
was granted 3 years later. One have to ask, how good the chances for USPTO to OK the PUBPAT request?
Or, even if the request is granted, how slim the chances for USPTO to declare the 366 patent invalid?

Sorry for the long post.

DD