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Message: Results of searching in PCT for TECHNOLOGY PROPERTIES LIMITED
| 1. | (WO 2008/027866) ACOUSTIC TRANSDUCER | 06.03.2008 | H04R 9/06 | PCT/US2007/076951 | TECHNOLOGY PROPERTIES LIMITED |
| A transducer utilizes a sound-producing member positioned in the area of magnetic flux concentration between magnetic poles of opposite polarity. The sound-producing member is variably vibratable in a magnetic structure between the poles to generate acoustic waves, and an acoustic conduit carries the acoustic waves through the magnetic poles to a location outside the magnetic structure. | |||||
| 2. | (WO 2007/139964) CIRCULAR REGISTER ARRAYS OF A COMPUTER | 06.12.2007 | G06F 9/40 | PCT/US2007/012539 | TECHNOLOGY PROPERTIES LIMITED |
| A stack processor comprises a data stack with a T register, an S register, and eight hardwired bottom registers which function in a circular repeating pattern. The stack processor also comprises a return stack containing an R register, and eight hardwired bottom registers which function in a circular repeating pattern. The circular register arrays described herein eliminate overflow and underflow stack conditions. | |||||
| 3. | (WO 2007/117414) METHOD AND APPARATUS FOR OPERATING COMPUTER PROCESSOR ARRAY | 18.10.2007 | G06F 9/40 | PCT/US2007/008235 | TECHNOLOGY PROPERTIES LIMITED |
| A computer array (10) has a plurality of computers (12) for accomplishing a larger task that is divided into smaller tasks, each of the smaller tasks being assigned to one or more of the computers (12). Each of the computers (12) may be configured for specific functions and individual input/output circuits (26) associated with exterior computers (12) are specifically adapted for particular input/output functions. An example of 24 computers (12) arranged in the computer array (10) has a centralized computational core (34) with the computers (12) nearer the edge of the die (14) being configured for input and/or output. Mechanisms are described for communications between computers (12) and the outside environment. | |||||
| 4. | (WO 2007/098026) METHOD AND APPARATUS FOR MONITORING INPUTS TO A COMPUTER | 30.08.2007 | G06F 15/16 | PCT/US2007/004083 | TECHNOLOGY PROPERTIES LIMITED |
| A computer array (10) has a plurality of computers (12). The computers (12) communicate with each other asynchroπously, and the computers (12) themselves operate in a generally asynchronous manner internally. When one computer (12) attempts to communicate with another it goes to sleep until the other computer (12) is ready to complete the transaction, thereby saving power and reducing heat production. The sleeping computer (12) can be awaiting data or instructions (12). In the case of instructions, the sleeping computer (12) can be waiting to store the instructions or to immediately execute the instructions. In the later case, the instructions are placed in an instruction register (30a) when they are received and executed therefrom, with... | |||||
| 5. | (WO 2007/098025) COMPUTER SYSTEM WITH INCREASED OPERATING EFFICIENCY | 30.08.2007 | G06F 15/16 | PCT/US2007/004082 | TECHNOLOGY PROPERTIES LIMITED |
| A microprocessor system in which an array of processors communicates more efficiently through the use of a worker mode function. Processors that are not currently executing code remain in an inactive but alert state until a task is sent to them by an adjacent processor. Processors can also be programmed to temporarily suspend a task to check for incoming tasks or messages. | |||||
| 6. | (WO 2007/098024) ALLOCATION OF RESOURCES AMONG AN ARRAY OF COMPUTERS | 30.08.2007 | G06F 15/16 | PCT/US2007/004081 | TECHNOLOGY PROPERTIES LIMITED |
| A computer array (10) has a plurality of computers (12). The computers (12) communicate directly with neighbor computers and indirectly with other computers in the array. The computers pass data words that include data and/or instructions. As many as 4 instructions can be included in one 18 bit data word. Since four instructions are communicated at a time it is possible to communicate an entire micro-loop made up of as many as four instructions. The computers of the present invention can execute instruction directly from their input registers. | |||||
| 7. | (WO 2007/098023) ASYNCHRONOUS POWER SAVING COMPUTER | 30.08.2007 | G06F 15/16 | PCT/US2007/004080 | TECHNOLOGY PROPERTIES LIMITED |
| A computer array (10) has a plurality of computers (12). The computers (12) communicate with each other asynchronously, and the computers (12) themselves operate in a generally asynchronous manner internally. When one computer (12) attempts to communicate with another it goes to sleep until the other computer (12) is ready to complete the transaction, thereby saving power and reducing heat production. A slot sequencer (42) in each of the computers produces a timing pulse to cause the computer (12) to execute a next instruction. However, when the present instruction is a read or write type instruction, the slot sequencer does not produce the pulse until an acknowledge signal (86) starts it. The acknowledge signal (86) is produced when it is ... | |||||
| 8. | (WO 2007/098007) ASYNCHRONOUS COMPUTER COMMUNICATION | 30.08.2007 | G06F 15/16 | PCT/US2007/004031 | TECHNOLOGY PROPERTIES LIMITED |
| A computer array (10) has a plurality of computers (12). The computers (12) communicate with each other asynchronously, and the computers (12) themselves operate in a generally asynchronous manner internally. When one computer (12) attempts to communicate with another it goes to sleep until the other computer (12) is ready to complete the transaction, thereby saving power and reducing heat production. A plurality of read lines (18), write lines (20) and data lines (22) interconnect the computers (12). When one computer (12) sets a read line (18) high and the other computer sets a corresponding write line (20) then data is transferred on the data lines (22). When both the read line (18) and corresponding write line (20) go low this allows bo... | |||||
| 9. | (WO 2007/098006) EXECUTION OF INSTRUCTIONS DIRECTLY FROM INPUT SOURCE | 30.08.2007 | G06F 15/16 | PCT/US2007/004030 | TECHNOLOGY PROPERTIES LIMITED |
| A computer array (10) has a plurality of computers (12). The computers (12) communicate with each other asynchronously, and the computers (12) themselves operate in a generally asynchronous manner internally. When one computer (12) attempts to communicate with another it goes to sleep until the other computer (12) is ready to complete the transaction, thereby saving power and reducing heat production. The sleeping computer (12) can be awaiting data or instructions (12). In the case of instructions/the sleeping computer (12) can be waiting to store the instructions or to immediately execute the instructions. In the later case, the instructions are placed in an instruction register (30a) when they are received and executed therefrom, without ... | |||||
| 10. | (WO 2007/098005) MICROLOOP COMPUTER INSTRUCTIONS | 30.08.2007 | G06F 15/16 | PCT/US2007/004029 | TECHNOLOGY PROPERTIES LIMITED |
| A computer array (10) has a plurality of computers (12). The computers (12) communicate with each other asynchronously, and the computers (12) themselves operate in a generally asynchronous manner internally. When one computer (12) attempts to communicate with another it goes to sleep until the other computer (12) is ready to complete the transaction, thereby saving power and reducing heat production. The sleeping computer (12) can be awaiting data or instructions (12). In the case of instructions, the sleeping computer (12) can be waiting to store the instructions or to immediately execute the instructions. In the later case, the instructions are placed in an instruction register (30a) when they are received and executed therefrom, without... | |||||
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