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Message: OPTY, 6 patent apps you posted are divisionals of MMP 5440749(see bottom of page

8 Availability of space in a RISC microprocessor architecture in my patents list
Inventor: SHAW GEORGE W (US); MCCLURG MARTIN G (US); (+3) Applicant:
EC: G06F12/08B14; G06F9/32B; (+4) IPC: G06F9/30; G06F15/00; G06F9/32 (+13)
Publication info: US2007271441 A1 - 2007-11-22
9 Detecting the boundaries of memory in a RISC microprocessor architecture in my patents list
Inventor: SHAW GEORGE W (US); MCCLURG MARTIN G (US); (+3) Applicant:
EC: IPC: G06F9/30; G06F9/30
Publication info: US2007271442 A1 - 2007-11-22
10 Using trap routines in a RISC microprocessor architecture in my patents list
Inventor: SHAW GEORGE W (US); MCCLURG MARTIN G (US); (+3) Applicant:
EC: IPC: G06F12/08; G06F12/08
Publication info: US2008071991 A1 - 2008-03-20
11 Floating point exception handling in a risc microprocessor architecture in my patents list
Inventor: SHAW GEORGE W (US); MCCLURG MARTIN G (US); (+3) Applicant:
EC: IPC: G06F9/302; G06F9/302
Publication info: US2008072021 A1 - 2008-03-20
12 Using breakpoints for debugging in a RISC microprocessor architecture in my patents list
Inventor: SHAW GEORGE W (US); MCCLURG MARTIN G (US); (+3) Applicant:
EC: IPC: G06F9/44; G06F9/44
Publication info: US2008077911 A1 - 2008-03-27
13 Transferring data between registers in a RISC microprocessor architecture in my patents list
Inventor: SHAW GEORGE W (US); MCCLURG MARTIN G (US); (+3) Applicant:
EC: IPC: G06F9/00; G06F9/30; G06F9/00 (+1)
Publication info: US2008091920 A1 - 2008-04-17
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