deb and others,

I am disappointed that the uspto is dredging up patent over patent. Here's a brief summary of what I can surmise from the latest update from the uspto

The examiner concludes that kajigaya's patent involves all of claim 4 minus the ring oscillator and he uses Tanimura to show that using a ring oscillator would be obvious. I see a couple of problems with the Tanimura patent. The ring oscillator does not feed a "processing unit" but instead feeds a refresh signal generating block (REFC). REFC in turn does not generate a clock but only a pulse. It is arguable that the pulse can be considered a system clock. Tanimura also describes his design as a "dynamic RAM" (column 1 line 66) while the examiner laughably calls the design a "microprocessor integrated circuit".