Mosaic ImmunoEngineering is a nanotechnology-based immunotherapy company developing therapeutics and vaccines to positively impact the lives of patients and their families.

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Message: been reading the board a while

I think this statement may be where the confusion arises. Typical Lawyer writting where you have to read the small print know the meaning of the statement (longest patent expiration date of the three mentioned below last thru 2015):

Protected through year of 2015, these patents protect techniques used in designing microprocessors, Digital Signal Processor (DSPs), embedded processors and System-on-Chip (SoC) implementations. The three most widely recognized patents in the portfolio are described below:

  • US'336: Clocking CPU and I/O Separately
    The MMP Portfolio is not limited to "high speed" microprocessors. In fact, during the past year of intense study of hundreds of various microprocessor designs, no correlation at all has been found between the speed of a microprocessor and the application of US'336. Use of US'336 is prevalent across most microprocessors from low speed microcontrollers to sophisticated systems on chips. Advertised advantages include: cost reduction, instant-on execution, failsafe operation, EMI reduction, and power savings. It is a modern requirement from a design for test ("DFT") perspective.
  • US'584: Multiple Instruction Fetch
    Multiple Instruction Fetch architectures are the norm in environments where limiting power consumption is critical; e.g. portable products. Various techniques can be employed to achieve the Multiple Instruction Fetch, and marketing terminology includes "VLIW," "SIMD," "MIMD", "Superscalar," etc.
  • US'148: On-Chip Oscillator and Embedded Memory
    Shares the on-chip oscillator feature with US'336, in addition to memory covering more than majority of chip. Also includes claims pertaining to multiple CPU, array or cell implementations. The vast majority of the SoC and flash microcontroller products are affected.
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