I realize they are referring to the 749 patent here, but weren't the terms right-justified refferring to receiving instructions from registers in the 584 patent the problem we had with claim 29 of the 584? Perhaps over-comming this obsticle will help us with that issue also?

B. “Multiple Sequential Instructions” and Related Terms

1. “Multiple Sequential Instructions” (JCCS Row 7)
The broad claim term “multiple sequential instructions” is found in both Claims 1 and 97 of the ‘749 Patent, and its construction is closely related to three other claim terms. Plaintiffs’ Construction TPL’s Construction Two or more instructions in sequence, in which any operand that is present must be right-justified in the instruction register Two or more instructions in a program sequence TPL’s proposed construction of this term is very similar to the first half of Plaintiffs’ proposed construction, but Plaintiffs add the limitation “in which any operand that is present must 6 These are “the fastest form of memory device built on the chip, delivering data in as little as 3 n[ano]s[econds].” Id. at 19:13-15. 7 The ‘749 patent has been in reexamination since March 2008, and Claims 1 and 9 are currently pending in that reexamination. be right-justified in the instruction register.” JCSS Row 7. Defendants’ construction follows the guidance of Phillips v. AWH Corp., 415 F.3d 1303 at 1312, where the words used in a claim are generally given their ordinary and customary meaning. Here, “multiple” means “two or more,” and “sequential instructions” means “instructions in a program sequence.” Plaintiffs’ proposal goes beyond the claimed sequential instructions in an attempt to sweep in instruction registers themselves, and operands within those registers. This is wrong. Plaintiffs erroneously seek to limit the claim to variable width operands, but variable width operands are only a preferred embodiment in the specification, and should not be read into the claims when the claim language is broader than the embodiments, as is the case here. See Electro Med. Sys., S.A. v. Cooper Life Sci., Inc., 34 F.3d 1048, 1054 (Fed. Cir. 1994). Although variable width operands must be right-justified in the instruction register (see ‘749 patent, 18:33- 45; Mar Decl., Ex. M), not all operands in the ‘749 patent are variable width, nor must they all be right-justified in the instruction register. As but one example, the specification describes 8 bit instructions that consist of a 4-bit opcode and a 4-bit operand. Id., 31:35-32:16. Such 8-bit instructions can be located anywhere in the instruction register, and thus the corresponding operand is not necessarily right-justified in the instruction register. Because Plaintiffs’ construction would read out these preferred embodiments, it should be rejected. 8 2. “Sequence of program instructions” (JCCS Row 30) This claim term is found in Claim 4 of the ‘148 patent. Defendants propose it be construed simply as “one or more instructions in a program sequence.” Plaintiffs once again seek 8 The prosecution history contains a 10/25/94 Examiner Interview Summary, where the examiner’s handwritten notes say “Claim 1: Opera. Width is variable & right adjusted.” Mar Decl., Ex. O at TPL0001136. In the Response to Office Action leading up to that interview, the applicants were overcoming the Boufarah prior art reference. In the amendment filed immediately after the interview, the applicants acknowledged a possible amendment to add variable width operands to overcome Boufarah, but never entered that claim language. ‘749 Pros. Hist.; Mar Dec., Ex. W at TPL0001169-1171. It is a “bedrock principle” that “the claims of a patent define the invention” and “we look to the words of the claims themselves.” Vitronics Corp. v. Conceptronic, Inc., 90 F.3d 1576 (Fed.Cir.1996). An unadopted amendment accordingly cannot limit the claims. Similarly, the unadopted amendment “does not show any clear and unambiguous disavowal” of claim scope. Invitrogen Corp. v. Biocrest Mfg., L.P., 327 F.3d 1364, 1369 (Fed. Cir. 2003). to import the restriction “in which any operand that is present must be right-justified in the instruction register. See JCCS Row 30. Without that improper limitation, as discussed above, Plaintiffs’ proposed construction is “two or more instructions in sequence.” Since a sequence of
instructions can be one or more, the Court should adopt Defendants’ proposed construction. 3. “Instruction register” (JCCS Row 12) This term is found in Claim 1 of the ‘890 patent. The parties agree on the construction “register that receives and holds one or more instructions for supplying to circuits that interpret the instruction,” JCCS Row 12, but Plaintiffs seek to import the same restriction as noted above. For the reasons previously discussed, the Court should adopt Defendants’ construction.