2nd Pacer--[PROPOSED] JURY INSTRUCTIONS INCORPORATING DEFENDANTS’ CLAIM CONSTRUCTIONS (Not Signed By Judge)

UNITED STATES DISTRICT COURT
NORTHERN DISTRICT OF CALIFORNIA
SAN FRANCISCO DIVISION
ACER, INC., ACER AMERICA CORPORATION and GATEWAY, INC.,
Plaintiffs,
v.
TECHNOLOGY PROPERTIES LIMITED, PATRIOT SCIENTIFIC CORPORATION, and ALLIACENSE LIMITED,
Defendants.

[PROPOSED] JURY INSTRUCTIONS INCORPORATING DEFENDANTS’ CLAIM CONSTRUCTIONS

Date: January 27, 2012
Judge: Hon. James Ware
HTC CORPORATION and HTC AMERICA, INC.,
Plaintiffs,
v.
TECHNOLOGY PROPERTIES LIMITED, PATRIOT SCIENTIFIC CORPORATION and ALLIACENSE LIMITED,
Defendants.
BARCO, N.V.,
Plaintiffs,
v.
TECHNOLOGY PROPERTIES LIMITED, PATRIOT SCIENTIFIC CORPORATION and ALLIACENSE LIMITED,
Defendants.

JURY INSTRUCTIONS REGARDING CLAIM CONSTRUCTION

It is my job as judge to provide to you the meaning of any claim language that must be interpreted. You must accept those interpretations as correct. I will now tell you the meanings of the following words and groups of words from the patent claims.
The words “multiple sequential instructions” mean “two or more instructions in a program sequence.” The words “separate direct memory access central processing unit” mean “electrical circuit for reading and writing to memory that is separate from a main CPU.” The words “instruction register” mean “register that receives and holds one or more instructions for supplying to circuits that interpret the instructions.” The words “operates asynchronously to” mean “timed by independent clock signals.” The words “supply the multiple sequential instructions to said central processing unit integrated circuit during a single memory cycle” mean “provide the multiple sequential instructions in parallel to said central processing unit integrated circuit during a single memory cycle.” The words “clocking said central processing unit” mean “timing the operation of the CPU.” The words “ring oscillator” mean “an oscillator having a multiple, odd number of inversions arranged in a loop.” The words “providing an entire variable speed clock disposed upon said integrated circuit substrate” mean “providing a variable speed system clock that is located entirely on the same semiconductor substrate as the CPU and does not directly rely on a command input control signal or an external crystal/clock generator to generate a clock signal.” The words “push down stack connected to said ALU” mean “data storage elements organized to provide last-in first-out access to items connected to convey signals to a digital circuit that performs both arithmetic and logical operations.” The words” as a function of parameter variation” mean “based on parameter variation.”

(Not Signed By Judge)