IR imagers currently require hybrid read-out integrated circuits (ROIC's)and additional separate AD converters (ADC) to provide transmittable data formats to digital signal processors (DSP's). The DSP is currently dominated exclusively by CMOS technology as the only high density low power technology. New capabilities for IR imaging based on GaAs are being developed which have the potential for monolithic ROIC's. However the advantage of the monolithic pixels increases enormously if digitization could also be realized within the chip. To this end, a special requirement is to develop and optimize the IR pixel simultaneously with the ADC. ODIS has identified a unique opportunity to implement novel multi-wavelength pixel designs together with a OZ ADC in which the true OZ performance can only be realized with a high speed decimator. At 60GB/s bit rates, the only solution to the decimator is EO logic. The pixel response is based upon intersubband absorption with CCD read-out transfer. The EO logic is based upon the unique thyristor properties. The combination of these functions monolithically will result in unrivalled IR capability. In this project, ODIS will optimize the pixel response and readout amplifiers in a planar technology platform that supports the EO logic needed for the decimation. BENEFIT: The digital processor market is several billion dollars with steady growth potential based upon an expanding PC industry. The IR imager market will realize huge growth with the availability of monolithic pixel and ROIC combinations. A market opportunity thus exists to produce IR imagers supported by EO logic circuits. The market share for GaAs based digital products in the multi-GB/s range will expand dramatically. Digital and imaging products can now be added to a growing number of markets addressed by integrated optoelectronics including parallel optical data links, optical interface circuits, phased array receivers and other markets currently dominated by Si.

http://www.sbir.gov/sbirsearch/detail/8151