I've been asked to weigh in on what I think about POET. Before I do, I want to offer up a few caveats and disclaimers.

1). I'm a journalist, not an engineer.

2). I have no financial position in this company or any other company in the semiconductor business. I own no stocks, no bonds, no mutual funds, nothing.

3). I know nothing about investment markets. I can't tell you if POET is a good investment or not. I'm here to talk about technology.

4). This critique is focused on the question of whether POET's technology is poised to take the *general* semiconductor manufacturing industry by storm. GaAs has well-known specialized applications and will continue to be highly relevant within that space.

About Gallium Arsenide

One of Poet's major talking points is that their chips are built on gallium arsenide. This semiconductor material (GaAs) has a number of advantages over silicon. In the 1980s, it was thought that GaAs chips would take over completely from silicon within a decade. Even now, GaAs is part of a group of semiconductor materials called the III-V semiconductors that many companies think will play an important role in the future.

It's important to understand that many of the application areas that POET talks about as core strengths are *precisely* the areas where GaAs is known to excel and has been used for decades. The semiconductor industry as a whole considered moving to gallium arsenide in the 1990s and collectively rejected the idea, leaving the technology as a niche application with specific uses for defense and space technology.

In order for POET to claim that GaAs is going to make a triumphant return as the future of the industry, it will have to demonstrate that it can produce gallium arsenide wafers that are 9x larger than current 4-inch wafers (modern semiconductors are built on 12-inch wafers). It will have to demonstrate that it can overcome the brittleness and fragility of GaAs wafers compared to conventional silicon, and that it can finish and polish the wafers quickly enough to make integrating them into modern manufacturing viable. This is particularly important because GaAs wafers are far more expensive than silicon wafers. According to price data I found, a 4-inch gallium arsenide wafer costs $300 each. Equivalent silicon wafers are $20-$40. This is not directly applicable because the wafers used for cutting-edge logic production are far more expensive than relatively low-end silicon wafers used for solar panels, but everyone is in agreement -- the starting costs for gallium arsenide are much, much higher.

Gallium arsenide ingots are grown, doped, and processed in a manner entirely different from silicon. There is no getting around this -- the entire world semiconductor market would have to reshape its supply line and wafer processing in order to build large numbers of GaAs chips.

The Tyranny of Moore's Law

Next, there's Poet's claim that it enables an integrated, monolithic IC design as opposed to a differentiated block. Supporters claim that this will allow for drastically improved die sizes that offset the expense and cost of moving to a different material. I think it's helpful, in this instance, to examine the existing Apple A7 28nm die. At 107mm sq, it contains two CPU cores, four GPU cores, 4.5MB of memory, a camera interface, the integrated motion sensor, the DRAM interface and bus, USB and LCD controllers, and a highly sophisticated clocking gmechanism to enable low power states.

It does all this in 107mm sq. The Intel Prescott, built on 90nm, was a 112mm sq chip. It had a little over 1MB of total onboard memory, no integrated memory controller, no GPU, no L3 cache, and no USB or camera interfaces on die. In order to build the Apple A7 in the same size package in 100nm, an optoelectronic chip would have to allow for 3-4x greater transistor density scaling than anything we use today.

There's simply no evidence that optoelectronics presents anything like the necessary die space savings, which would drive costs sharply *upwards* in conjunction with far more expensive wafers. Cutting down on wire lengths and bonding costs would surely help to offset the final die size, but every transistor in a 100nm chip is 3-5x *bigger* on 90nm and there is no offset for that. An Apple A7 contains over a billion transistors.

This is the tyranny I spoke of. In order to have a prayer of actually fitting into smaller form factors, a POET design would still need to approach modern die sizes. I suspect n-1 would do the trick -- so a modern-day 40nm process in POET might be close enough to offset. But there's a different problem.

Everything must be redesigned:

Forget the claims that this technology is a seamless upgrade and look at the design side. There's no way around this -- every chip, every feature, every floor plan must be rebuilt from the ground up on a new semiconductor. That means simulators and layout design tools have to be rebuilt first -- you can't simulate the performance of a chip if you don't know what the characteristics are going to be.

A company that bought POET now would be looking at 2-3 years, minimum to bring parts to market. It would have to shoulder the cost of ramping gallium arsenide wafers alone because no one else in the industry is looking to do that. Given just how different GaAs and POET would be, I suspect 5-6 years from purchase to genuine commercial scale is a more realistic figure.

In the last line of my story, I refer to no one else being able to afford to get next-generation materials *right.* This is precisely what I meant. Any company wanting to commit to POET-style GaAs technology faces a complete ground-up redesign of all its products, the adoption of an entirely new type of wafer production at prices 3-5x higher than competiting silicon wafers, the need to purchase or refit lithography equipment (one piece of EUV equipment can run over $100M), and the cost of refitting an entire production line. The costs are *staggering*, which is precisely why the move to 450mm has been so slow. You can't just run a six-inch wafer through a 300mm machine.

It's not enough to be faster than silicon.
It's not enough to be cheaper than silicon.
It's not enough to have better thermal characteristics than silicon.

The company that takes a chance on POET (or any other next-gen tech) is going to spend hundreds of millions of dollars and, even more importantly, years of time refitting designs. They need to know that it's going to be worth it. If Intel or TSMC or Samsung bought POET today, you wouldn't see commercial chips built on the technology until 2020 or later because *that's* how long it takes to redesign and then manufacture a new chip on a completely different process. It took Intel more than four years to move to FinFETs, and FinFET was a much smaller design change than GaAs.

The cost, difficulty, complexity, and long time frames required for any technology to replace silicon are the reasons why I remain fundamentally dubious of any declaration of a "solution" being in hand.

Could POET be "the solution" everyone is looking for? If it is, expect engineers to start talking about it. Look for evaluations in the ITRS roadmaps. Watch for pilot productions and company acquisitions. But the barriers between where the semiconductor industry is today and where it would need to be to support a massive GaAs-based industry are massive.

Intel is talking about adopting III-V technology below the 10nm node which puts it in the 2018 - 2020 timeframe.

Conclusion:

Based on the contents of POET's presentations and papers, I remain fundamentally unconvinced that their technology will reshape the broad future of the semiconductor industry. This is not as damning as it might sound; the overwhelming majority of progress in semiconductor manufacturing is evolutionary.

There are three things which, if they occurred together, would convince me otherwise.

1). A demonstrated method of growing GaAs ingots of sufficient purity and at equivalent wafer sizes at no more than 1.5x the cost of silicon.

2). The ability to mach CMOS transistor sizes at n-1 (40nm for the current generation of hardware).

3). An announcement from any major foundry or fab that they would integrate and build POET-derived processors for future customers or would bring their own POET-derived designs to market.

This does not mean that POET has no applications and should not be read as such.

Finally, this is my own opinion. I have no insider information on the company and would be happy to be proved wrong. I'd like to see a return to the good old days of scaling and performance advance. If I doubt that POET will accomplish this, it's partly because I doubt that any new technology will return us to the type of scaling we saw in the early 1990s.