See Paragraphs below relating to PTK's March 4th News Release:

"Drive for Feature Size to 100-nm Range (MS-8)
The Company introduced a milestone associated with reducing feature size to the 100-nm range in scale, and has previously announced that it realized submicron device operation from an initial 800-nm down to 200-nm.

POET is moving steadily towards the goal of 100-nm feature sizes for the transistors within the POET platform, and has stabilized feature definition at the sub-200-nm level. Short channel considerations are being addressed with new innovations, and the critical step of isolating source-drain and gate contacts with oxygen implantation is nearing completion. The 100-nm goal is matched to the state-of-the-art commercial III-V foundry capabilities and will demonstrate greater than 20x speed improvement together with lower power consumption by 4x to 10x, depending on the application, compared to silicon at smaller nodes.

Although timelines are always subject to review depending on partner needs, the technical team sees no significant technical roadblocks ahead. POET anticipates completion of the 100-nm milestone by the end of April 2014."

I guess you guys were right and I just took what was stated by the corporation for granted. Given that the technical team did not anticipate any "significant technical roadblocks ahead", I took things as being on or ahead of time regarding milestone achievement of 100nm.

When announced/achieved, this one will be a BIGGIE!!!!

Sandman