Aiming to become the global leader in chip-scale photonic solutions by deploying Optical Interposer technology to enable the seamless integration of electronics and photonics for a broad range of vertical market applications

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Message: Re: worst case scenario
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  • How I understand this Hollydurg is the TDK is the design kit that helps implement the poet process to existing technology. Also I believe the 200nm has been reached but they are still working on the 100nm which is Milestone 8. The technology exists now at 200nm and 100nm is almost done I believe . I also don't see how they wouldn't be able to mass produce it or that it would be cost prohibitive if Taylors law is coming to an end and we have the answer. All new technology is expensive in the early stages.

    I believe your other concerns are answered in the snippets I have copied from Poet press releases.

    Drive for Feature Size to 100-nm Range (MS-8)
    The Company introduced a milestone associated with reducing feature size to the 100-nm range in scale, and has previously announced that it realized submicron device operation from an initial 800-nm down to 200-nm.

    POET is moving steadily towards the goal of 100-nm feature sizes for the transistors within the POET platform, and has stabilized feature definition at the sub-200-nm level. Short channel considerations are being addressed with new innovations, and the critical step of isolating source-drain and gate contacts with oxygen implantation is nearing completion. The 100-nm goal is matched to the state-of-the-art commercial III-V foundry capabilities and will demonstrate greater than 20x speed improvement together with lower power consumption by 4x to 10x, depending on the application, compared to silicon at smaller nodes.

    Although timelines are always subject to review depending on partner needs, the technical team sees no significant technical roadblocks ahead. POET anticipates completion of the 100-nm milestone by the end of April 2014.

    POET/TDK provides complete documentation for the entire catalog of active electronic and electro-optical devices currently supported by the POET process. It comprises a comprehensive device parameter library, and enables potential customers and partners – including semiconductor foundries and device and library developers – to implement the POET process.

    Drive for Reduction of Feature Size to 100-nm Range (100nm), Milestone #8 – The Company has introduced new specific milestones associated with reducing feature size to the 100-nm range in scale. The POET team has realized submicron device operation down to 200-nm. The path to maintaining scaled operation down to 100nm has been identified. The Company has scheduled its Molecular Beam Epitaxy (MBE) to be shut down for cleaning and maintenance for a period of approximately 6 weeks after completing Milestones 5 and 7. After restarting the MBE, the Company expects to complete Milestone 8 and, accordingly, the timeline for the completion of this milestone has been moved to the first quarter of fiscal 2014. The 100-nm goal is matched to the state-of-the-art commercial III-V foundry capabilities and will demonstrate the greater than 50x speed improvement together with lower power consumption by a factor ranging from 4 to 10 depending on the application as compared to silicon at smaller nodes. Significant progress has been made on the completion of this milestone, although it has proven to be more difficult to achieve with the limited equipment available to POET. This highlights the importance of developing an alliance with a fab partner where repeating this milestone and improving it will be significantly easier with advanced lithography equipment standard for CMOS processing.
    As far as the B too brittle it is addressed below :

    Toronto, ON, and Storrs, CT, February 24, 2014 – POET Technologies Inc. (TSX-V: PTK, OTCQX: POETF) (“the Company”) – announced today the fabrication of infrared (IR) detectors, using its proprietary planar optoelectronic technology (POET) platform for monolithic fabrication of integrated electronic and optical devices on a single semiconductor wafer.

    The achievement of these devices marks a significant milestone in development, realizing with a commercial foundry the integration of both electronic devices (n-channel transistors) with optical devices (IR detector) in a monolithic process.

    The accomplishment is made more significant because the POET wafers used for the IR devices were fabricated with an independent foundry, BAE Systems’ Microelectronics Center in Nashua, New Hampshire. BAE Systems has produced compound semiconductor devices based on gallium arsenide for more than 20 years for use in its defense, radar, and communications systems. This milestone, therefore, represents the integration by a third party of the optoelectronic process previously demonstrated in POET laboratories.

    “Having IR detection for the first time is a major milestone for the POET technology,” said Dr. Pane Chao, technical director at BAE Systems’ Microelectronics Center. “BAE Systems’ relationship with POET Technologies is mutually beneficial in that we are able to supply foundry services while being exposed to this rapidly evolving capability.”

    Dr. Geoff Taylor, member of the Board of Directors of POET and Chief Scientist, said, “Our successful fabrication of a functioning integrated optoelectronic device, using the POET platform, should be considered a major breakthrough for POET and the industry.” Dr. Taylor went on to state, “This is a story about teamwork and shared vision, and the entire team deserves recognition for the work leading to this landmark achievement. POET will be the future platform for integrated IR and many other device systems.”

    The POET IR device addresses the need of military and industrial clients for uncooled mid-wave infrared (MWIR) and long-wave infrared (LWIR) sensors and cameras – for perimeter security, thermography, medical imaging, automotive forward sensors, and smartphone input applications. It has potential advantages over competitive devices in three aspects:

    • MWIR and LWIR detection in the same pixel. MWIR detection (2-8um) occurs in self-assembled quantum dots with normal incidence light and no diffraction gratings, and uses only the n-type heterointerface within POET. The p-type interface results in LWIR detection (8-12um). By combining both interfaces within POET, MWIR and LWIR detection will be obtained simultaneously in the same pixel.
    • Lower device cooling requirements. Near-room-term temperature operation is another advantage of the POET IR detector, possible because of the lower device dark current.
    • Integrated optoelectronic advantages. The devices provides for the practical integration, for the first time, of the optical detector with the electronic transistor readout and signal-processing circuits. Thus, high-density, single-chip focal-plane arrays are possible using front-side imaging, without resorting to wafer thinning.

    Beyond the fully-integrated monolithic IR detector, the Company remains on track to deliver to industry, and specifically to its development partners, other fully-integrated monolithic optoelectronic devices based on the Company’s POET platform.

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