I came across an old post by np56 (July 25, 2014), titled Ajit Manocha Gives Semicon West Keynote.

http://agoracom.com/ir/POETTechnologies/forums/discussion/topics/618608-ajit-manocha-gives-semicon-west-keynote/messages/1938301

This was a link to a blog about Ajit giving a Semicon West Keynote.

https://dac.com/blog/post/ajit-manocha-gives-semicon-west-keynote

I find the following paragraph very interesting (bold is mine):

Even if you have the money, there are real technology challenges out there. Device architecture with FinFET and FD-SOI and, further in the future, NanoWires and using III-V materials with silicon. On the litho side there are lots of issues with both double patterning (primarily just cost) and EUV (primarily source power at present).

Some (many?) were quite surprised to hear in the Apr 27 NR, when Dr. Deshmukh stated (bold is mine):

"I see tremendous potential with POET Technology's innovative approach to combining Si based IC's with III-V materials based optical components on the same chip that could revolutionize the mobility, telecommunications/networking, large data management, and other technology sectors. I am very excited to be part of the team to drive this innovation into the market."

I guess this statement was not as new as we might have thought, seeing as Ajit brought it up in July 2014? (or at least I missed it)

Good luck!!