I thought it would be worthwhile to do a bit of a review of the Indian RFP:  First let’s consider the timing of the RFP. It was issued in June 2017 which is important to consider as this would be a point in time where the status of the POET GaAs development is well known. And when we look closely at the 3 phases of work with regard to the milestones it really appears to have very conservative targets in the first year with goals that should be very achievable.

3.1.1.17 The specifications of the transferred devices are provided in the Annexure to this

document. They cover the following devices:

(a) Enhancement and depletion HFET devices when fabricated in the same circuit along

with optical devices

(b) Stand-alone enhancement and depletion HFET parameters

(c) Stand-alone pseudo-morphic HFET parameters

(d) VCSEL specifications for communications applications

(e) VCSEL specifications – Quasi-Continuous Wave

(f) Quantum dot detectors

(g) Multi-junction Solar Cells

3.1.1.18 Phase 1 Milestones:

(a) Delivery of technology transfer documentation to SCL.

(b) Demonstration of HFETs, VCSELs, photovoltaic devices and photodetectors as per

target specifications.

(c) Complete design of epitaxial layer stack for MWIR quantum dot photodetector.

I think it is a given that POET’s involvement was facilitated by Ajit Manocha which began in 2015 when he presented at Deftronics where he reported meeting with the DRDO and the ISRO Chairman to discuss POET... describing the disruptive capability for Indian defense in which he commented that time will tell if it goes further. https://www.youtube.com/watch?v=GfOzwfFpXGg

So when we consider that Ajit was appointed as the president and CEO of SEMI on Feb 21, 2017 it kind of made me wonder why he stayed on with POET until Sept. He stepped down as Executive CEO shortly after being appointed to SEMI but remained a director. So if we believe that Ajit facilitated India’s interest to develop POET for their own use in defense and aerospace it would make sense that Ajit would continue  to represent POET until the RFP was released.

Now to change topics re the DL/BB platform.

Lebowski asked me in the following post:

https://agoracom.com/ir/POETTechnologies/forums/discussion/topics/702999-i-guess-i-just-can-t-help-myself/messages/2182485#message

Have we seen anything to prove we are employing an 8 inch wafer line either on silicon or a derivative though? I'm not aware.

As I had another listen to the AGM audio clip Suresh states this fairly directly at 24 minutes and elaborates on this throughout his talk. Suresh describes the optical bench which is built on silicon and scales to the size of silicon wafers. “It is inherently scalable to 8 inch and 12 inch silicon wafers”.

http://wsw.com/webcast/cc/ptk/index.aspx

At time 39 minutes Suresh talks about the needs of continued GaAs development and he states “we would like to  immediately engage with a strategic partner” so that it can be funded in a non-dilutive way to bring the technology to commercialization not just for the AOC but for alternate and new applications. I immediately think about the Indian RFP and the IR focal plane array, MMIC and triple junction solar cells.