Aiming to become the global leader in chip-scale photonic solutions by deploying Optical Interposer technology to enable the seamless integration of electronics and photonics for a broad range of vertical market applications

Free
Message: And than came POET's optical interposer - a great read to understand what challenges POET are addressing/solving

And than came POET's optical interposer - a great read to understand what challenges POET are addressing/solving

posted on Nov 14, 2018 08:25AM

Quality Challenges Data Center PIC Ascendency

https://picmagazine.net/article/105019/Quality_challenges_data_center_PIC_ascendency/feature

Some snippets and highlights:

After working in quality engineering field for 12 years, almost 3 years at Facebook, Zeng has seen generations of products pass under his group’s watchful eyes. The latest PIC-based solutions have experienced unusually elevated level of rejects from the beginning of large deployments of the products. This is due to several functionality and process control issues stemming in part from the fact that the relatively new photonics integration industry is still striving to attain the levels of quality control and automation that other semiconductor manufacturers have adopted as standard operating procedures (SOP). Photonic integrated circuits are striving to grow beyond their ‘lab-to-fab’ roots.

“We believe ultimately that consistent process control realized (through) less human contact with components and more automation will reduce process related failures. This requirement will be applied to the wafer level process as well as the photonic package level," Zeng noted, adding that manufacturers are already responding. “We are consistently seeing monthly manufacturing yield and field quality performance improvements after we introduce more and more automation into packaging process. Tight and consistent screening for defects on the wafer level also helps to increase yield."

“From what we have learned, more consistent process (steps) with less human handling errors results in higher quality of the photonic device. Co-packaged optics solutions will eventually help to meet those challenges. Co-packaged optics will integrate (the) ASIC and optics on the wafer level and dramatically reduce the integration steps required during packaging processes. Wafer level integration will aid quality because we will have many fewer discrete optical components; we will fully utilize current IC CMOS process standards to strictly control the building block process. In real application fields like in data centers, the number of pluggable devices will be dramatically reduced with deployment of the co-packaged optics switches," he explained.

Definitely a great read for the "average joe" and all this is concurrent with Poet's solutions.

A good retrospective of what datacenters have experienced to date with photonic integrated products. Someone out there may have a solution :)

 

 

 

 

 

Share
New Message
Please login to post a reply