I am not sure I understand your question Jack. How big will it be?

Are you talking about initial production capacity?

Are you talking about the ultimate size of the POET market?

What we do know is that POET can place 400 optical engines on an 8in silicon wafer. And by observation that appears to be a full blown 400G optical engine with CWDM filtering in the example provided in the new presentation.

If we extrapolate that number to a 12 in wafer that number becomes 1000 optical engines per wafer.

Now we do have documentation on the wafer scale 3d assembly process by way of information contained within the die attach patent.

The metrics provided in that patent states that conventional singulated (diced) die attach 3d bonding requires roughly 8 hours to attach 1000 die. Using the wafer scale assembly processes that time shrinks to 1hr 14 seconds.

How big in terms of market size? That information is updated in the AGM presentation. How long would it take POET to capture a share of that market corresponding to the cost reduction enabled should really be limited only by the production capacity that POET can put into place. This is of course all dependent on how successful POET will ultimately be but I harken back to the investment that insiders made in the debenture as a good gauge for determining the potential for a successful outcome.

At this time it very much looks like it will be a low cost high performance high volume solution that industry wants. And they have the attention of at least one very large Tier 1 company who apparently expect POET to provide optical engines intersecting their roadmap.

Wasn’t it CISCO who recently talked about their 400G switch and how they expect to have the optical module available in 2020?