Aiming to become the global leader in chip-scale photonic solutions by deploying Optical Interposer technology to enable the seamless integration of electronics and photonics for a broad range of vertical market applications

Free
Message: Re: Patent: METHOD OF FORMING AN HERMETIC SEAL ON ELECTRONIC AND OPTOELECTRONIC PACKAGES
  FIG. 24 shows an exemplary layout of optical components in a submount assembly showing the relative positions of the Loopback waveguide in an embodiment in which the Loop back waveguide occupies sacrificial parts of the substrate;
       FIG. 25 shows a loop-back waveguide structure that provides an optical path for wafer level testing of electro-optical devices on a submount assembly;
       FIG. 26 shows a loop-back waveguide structure that provides an optical path for wafer level testing of electro-optical devices on a submount assembly. The loop back waveguide occupies a sacrificial area of the substrate in this embodiment;

FIG. 27A-27B show an embodiment of an ODI with a loop back waveguide in which the waveguide resides on a neighboring die relative to the die for which the operational data is collected: FIG. 27A Neighboring die from a ODI submount wafer that shows the relative position of the loop back waveguide wafer level test feature before singulation of the die, and FIG. 27B a single submount assembly substrate after singulation of the die;

Share
New Message
Please login to post a reply