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Message: Re: DIE TESTING... WAS: Re: Patent: METHOD OF FORMING AN HERMETIC SEAL ON ELECTRONIC AND OPTOELECTRONIC PACKAGES
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Patent: METHOD OF FORMING AN HERMETIC SEAL ON ELECTRONIC AND OPTOELECTRONIC PACKAGES
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turr
Dec 01, 2019 03:45PM

Re: DIE TESTING... WAS: Re: Patent: METHOD OF FORMING AN HERMETIC SEAL ON ELECTRONIC AND OPTOELECTRONIC PACKAGES

posted on Dec 02, 2019 09:24AM
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Wafer level testing is a must and only way forward for all of the industry.

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Has it been done by others, or did POET basically sew up for itself the (only viable?) process within its recent patent?

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