https://www.ofcconference.org/en-us/home/program-speakers/rump-session/

The above is a link to one of the more interesting rump sessions at OFC.

It is interesting to note that in the latest news release Suresh makes this statement:

"With optical losses at a fraction of that of other materials, our waveguides and filters enable the fabrication, assembly and testing of integrated optical engines at wafer scale, providing maximum flexibility across a broad range of applications, from datacom to co-packaged optics."

If you follow the link I posted you will conclude that efforts towards co-packaging optics is regarded as inevitable. Industry continues to wait for a technology that can do it. I believe that POET is that technology.

The list of presenters for that OFC rump session are as follows:

Provocateurs: 

Joris Van Campenhout; IMEC, Belgium
Peter De Dobbelaere; Cisco/Luxtera, USA
Jane Gu; University of California Davis, USA
Shu Namiki; AIST, Japan
Zuowei Shen; Google, USA
James Stewart; Facebook, USA
Rob Stone; Broadcom, USA
Greg Walz; Molex, USA
Zhiping Yao; Alibaba, China

It is interesting to note that Peter De Dobbelaere is the VP of Engineering at Luxtera (Cisco). I decided to have a look at his patents and see if he is working on anything that could improve silicon coupling and waveguide losses. He has a couple of patents in which the large silicon interposer is explained. Not much to them but it does offer some insight to conclude that they just don’t have anything that compares to  POET not in what I looked at. For anyone who looked at the video clip I posted some time ago it uses the same surface grating coupler as shown. My belief is that the photonic integration that they require in the future will not be supported by the silicon photonics technologies they are currently using. It is very lossy and there is no way around that. POET’s dielectric stack is described as virtually lossless. Silicon waveguides typically have to be very large to limit wavelenght drift with tight ambient control but the loss can be improved by using advanced lithography to  control  waveguide sidewall roughness...the dielectric does not require the use of advanced nodes to have low losses. 

http://www.freepatentsonline.com/20190215079.pdf

But really the point I was trying to make is that industry seems to be skipping over on-board optics and moving directly to co-packaging of optics and it appears that POET is in sync with that move. That move requires extremely tight collaboration with the semiconductor industry and the people who build ASICs as strategic partners.

I think POET will be in the right place at the right time. Pluggable optics will eventually give way to co-packaged optics and POET’s optical interposer platform with multiple configurations is a nice fit.