Aiming to become the global leader in chip-scale photonic solutions by deploying Optical Interposer technology to enable the seamless integration of electronics and photonics for a broad range of vertical market applications

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Message: "design in phase"

So the "design in phase" will consist of Tier1 (T1) requesting Poet to map out and submit their proposal to T1 of how they will build the configuration that T1 wants (w/ NRE). Using Poet design engineers working w/ T1 engineers to create the product design. Then it will be prototypes of the product design created, (milestones, NRE) followed by test and burn in. Is that appx. what's going to occur near term?

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