I actually touched on this during one of the debenture meetings.  With the lower cost platform and the smaller footprint N+1 redundancy becomes easier to implement if required.  Remember burn in is at wafer level utilizing a sacrificial lookback circuit and also known good die are used so yield is improved.  Recall from one of Tom Mika's presentations he did a good job identifying the reduction to failures due to weak insertion points at active alignment connections required in other systems. These active alignment points in existing technologies create free space scattering and reflections.

All this in combination with what ITTR identified in his explanation (good job). 

So  yes I  think POET will  provide a much  higher level of  reliability and where failure is critical for  the  application the customer will  identify  redundancy requirements. The lower cost and smaller footprint associated with the optical interposer makes it easier to implement. 

By the way on Friday afternoon Vivek’s video presentation had 97 views.  It has now had 621 views.

https://www.youtube.com/watch?v=cukhqUpfiTg&feature=youtu.be