This application is a continuation of previous patents:

US20210080649 - METHODS FOR OPTICAL DIELECTRIC WAVEGUIDE STRUCTURE

Office      United States of America

Application Number         17034246

Application Date                 28.09.2020

Publication Number          20210080649

Publication Date                 18.03.2021

Publication Kind                  A1

Applicants             POET Technologies, Inc.

Inventors              Suresh Venkatesan, Loy Yee Lam

Abstract

(EN)

An optical subassembly includes a planar dielectric waveguide structure that is deposited at temperatures below 400 C. The waveguide provides low film stress and low optical signal loss. Optical and electrical devices mounted onto the subassembly are aligned to planar optical waveguides using alignment marks and stops. Optical signals are delivered to the submount assembly via optical fibers. The dielectric stack structure used to fabricate the waveguide provides cavity walls that produce a cavity, within which optical, optoelectronic, and electronic devices can be mounted. The dielectric stack is deposited on an interconnect layer on a substrate, and the intermetal dielectric can contain thermally conductive dielectric layers to provide pathways for heat dissipation from heat generating optoelectronic devices such as lasers.

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