http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=10,962,715&OS=10,962,715&RS=10,962,715
United States Patent |
10,962,715 |
Ring , et al. |
March 30, 2021 |
Methods for optical dielectric waveguide structures
Abstract
An optical subassembly includes a planar dielectric waveguide structure that is deposited at temperatures below 400 C. The waveguide provides low film stress and low optical signal loss. Optical and electrical devices mounted onto the subassembly are aligned to planar optical waveguides using alignment marks and stops. Optical signals are delivered to the submount assembly via optical fibers. The dielectric stack structure used to fabricate the waveguide provides cavity walls that produce a cavity, within which optical, optoelectronic, and electronic devices can be mounted. The dielectric stack is deposited on an interconnect layer on a substrate, and the intermetal dielectric can contain thermally conductive dielectric layers to provide pathways for heat dissipation from heat generating optoelectronic devices such as lasers.
Inventors: |
Ring; William (High Bridge, NJ), Venkatesan; Suresh (Los Gatos, CA) |
Applicant: |
Name |
City |
State |
Country |
Type |
POET Technologies, Inc. |
San Jose |
CA |
US |
|
|
Assignee: |
POET Technologies, Inc. (San Jose, CA) |
Family ID: |
1000005454469 |
Appl. No.: |
16/036,179 |
Filed: |
July 16, 2018 |