Document describing current SCL research priorities, from June 2018.  No doubt recent procurement efforts to help support these proposed research activities.

http://www.scl.gov.in/pdf/pdf_document_scl_respond.pdf

Under CMOS process technology

B13

Si-on-GaAs: Monolithic Heterogeneous Integration of Si-CMOS with GaAs Optoelectronic Devices using EoE technology:

As electronic technology becomes faster and denser, electrical interconnects (wires) have begun to limit the performance of the systems that depends on them. In order to alleviate this problem, optical interconnects are being considered as an alternative. Some of the benefits of optical interconnects include higher speeds of operation with low drive requirements and minimal power dissipation, reduced size weight and cost, freedom from electromagnetic interference, crosstalk and ease of layout and routing. In order to implement optical interconnects, optoelectronic integrated circuits (OEICs) which integrate both electrical devices (transistors) with optical devices (optical detectors and emitters) must be created using electronic integrated circuits. However, due to intrinsic structure of silicon, this material is not capable of emitting light efficiently. Compound semiconductors such as GaAs on the other hand can be used to make LEDs and Lasers. Efforts are on without much success to develop technology that would support the monolithic integration of these two types of semiconductors. Therefore, it is proposed to develop a new technology which can combine silicon and GaAs substrates by wafer bonding or Epitaxy on Electronics (EoE).