https://www.fpgajobs.com/company/celestial-ai/job/chiplet-dv-lead/A2mY33ohRU/

Posted today

About the Role

Are you passionate about building cutting-edge products with the latest verification methodologies? Do you thrive in a dynamic, fast-paced startup environment? At Celestial AI Inc., we are working on real customer schedules, and we need engineers excited about innovation. With us, you’ll have the opportunity to take on a wide range of responsibilities and improve verification flows and methodologies.

As a growing startup, we’re scaling rapidly, and we’re looking for a Chiplet Design Verification Lead to drive our Chiplet verification efforts from pre-silicon simulation all the way through to production.

In this role, you will be responsible for leading verification strategy and execution for complex IP. You will work alongside a talented team in a collaborative  . As we expand, you’ll play a key role in scaling our methodologies, processes, and infrastructure to support critical projects.

Key Responsibilities

• Lead the verification of a complex 5nm SoC with high-speed interfaces.
• Collaborate closely with architects, customers, and design engineers to ensure successful product releases.
• Collaborate closely with customers to define and implement successful deliveries.
• Define and review verification and validation test plans for block-level, IP, and SoC-level projects.
• Lead and mentor a team of ASIC/SoC verification engineers, including external contractors.
• Manage critical milestones and deliverables with the ASIC/SoC design team.
• Shape SoC verification methodologies and processes in partnership with Architecture, Design, and Verification technical leads.
• Work closely with software and emulation teams to ensure first-pass tapeout success.

Qualifications

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field (or equivalent experience).
• 8+ years of experience in design verification with strong SystemVerilog expertise.
• 2+ years of experience with Python for verification.
• Expertise in UVM library development.
• Proficiency with simulators like Xcelium, ModelSim, Questa, or VCS.

Preferred Qualifications

• Master’s degree or higher in Electrical or Computer Engineering with 6+ years of relevant experience.
• Experience in AMS verification.

California location:

As an early startup experiencing explosive growth, we offer an extremely attractive total compensation package, inclusive of competitive base salary and a generous grant of our valuable early-stage equity.  The target base salary for this role is approximately $190,000.00 - $210,000.00. The base salary offered may be slightly higher or lower than the target base salary, based on the final scope as determined by the depth of the experience and skills demonstrated by candidate in the interviews.