Intel unveils 1Gbit NOR on 65nm Mike Clendenin EE Times (11/08/2006 4:04 AM EST) SHANGHAI, China — Intel Corp said Wednesday it is ready to ship the industry's first 1 gigabit NOR flash based on Multi-Level Cell (MLC) technology and a 65-nanometer manufacturing process. The part is based on Intel's StrataFlash (M18) architecture, and is targeted at multimedia phones with mega-pixel cameras, video and high-speed data capabilities. Until recently, NAND was the usual storage medium in these phones because of higher cell and array densities, but NOR in gigabit densities and with faster access should open up the game a little. Intel said it validated the part on the top 10 chipsets in the industry and already has design wins with Sony Ericsson and Infineon Technologies. The 65nm chip has a deep power down mode and is drop-in compatible with Intel's 512 megabit, 90nm-based chips, which came out last year. The 1.8 voltage and read speeds are the same as the 90nm chip, but the write speed has improved from 0.5Mbyte per second to 1.0Mbyte per second. "The write performance of this chip is the best of any NOR flash," said Greg Wong, a flash analyst with Web-Feet Research. "The chip is also one-third smaller than Spansion's 90nm 1Gb Mirrorbit, giving it a significant cost advantage." However, volume production starts in the fourth quarter, Wong said, meaning Intel is six months behind Spansion's 1Gb Mirrorbit. In 2007, Intel will introduce 65nm versions of 512Mbit, 256Mbit and 128Mbit densities of the M18 product family.