for those with an interest...

fpgajournal.com/articles_2006/20061114_cray.htm

"However, the true processing time difference would depend on how the microprocessor handles the 8-bit data."....

Perhaps the efforts of PTSC structure could help out here.

"Now, consider the time it would take to compute those same results in situ on the microprocessor, calculating one 64-bit result per clock cycle and running at 2.5 GHz. In this conventional architecture, the 10,000 adds would take 4 microseconds (10,000 operations / 2500*1024*1024 ops per second), assuming all the data was available every clock cycle. The bandwidth to memory is 6.4 GB/s, so moving the data from memory to the processor would take 12 microseconds (80,000 bytes / 6400*1024*1024 bytes per second)."