''Written in highly compact and optimized C computer language code, the
MicroOS operates in 14K of ROM and requires only 300 bytes of RAM.''

They match(for them an adjustable condition)  the cache to the read/write blocks of the media being used...and format accordingly. For Nand flash that can be as small as 256 bytes.....for HD the minium is normally 512 bytes.

This would be in comparison to others having to size corresponding RAM according to the erase block size  .... or for HD the sector size....normally amounting to multiple megabytes of RAM. The read/write blocks make up the erase block and sector sizes....different bios drives them accordingly.

I have read of others getting down as small as 4K bytes. If they are paging and caching in the same manner as e.Digital with a 4K cache...IMO...it will be infringement.

MOS operates independent of the erase block size for flash... or sector size of HD.

IMO...it will not be hard to spot others utilizing a like manner.

doni