RAM removed......
posted on
Mar 21, 2007 06:24AM
For those that have an interest.......
"In announcing their new, non-volatile Spartan-3AN family this week, it is clear that Xilinx approached the non-volatile problem differently. Often, on your board, you’d pair a low-cost SRAM FPGA like a Spartan-3 device with a commodity flash memory for storing the bitstream and possibly other user data. Xilinx just took the die for that flash memory and the die for that FPGA, stacked them using packaging techniques now common in cell phones and other space-constrained devices, and dropped them into a single package. Voila! A non-volatile FPGA. "
Xilinx has now removed the SRAM creating a new family of non-volatile FPGA.
This is a stacked system....it's even closer to what e.Digital does than what Actel is doing. However, it doesn't make any difference if the flash is stacked, or part of the same cell structure of the logic units substrate.
IMO...they are utilizing e.Digital ideas and eliminating RAM....that's now two doing it.
www.fpgajournal.com/articles_2007/20...
We have a past history with Xilinx and Actel
doni