In an effort to stimulate a little on topic commentary, of a technical nature.

I suggest the following...

serial(NAND) vs. parallel(NOR).....and the difference between the flash array architecture of each.  An array, being one(1) erase block with associated read/write block make up. Flash being a makeup of multiple arrays(erase blocks).

The array(erase block) characteristics for the physical connections of the read/write blocks within an erase block,  are different for each of the two types of flash, NAND vs. NOR, 

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For a  NAND array, the connections are serial...meaning the physical connections for the read/write blocks are connected in a single string or linear fashion. The make up for a linear structure allows for great density. It involves nothing more than making the linear string longer.

The problem: For such a system, in order to orchestrate/manipulate a structure of data, simple concepts are available with limited ability. However, to get beyond the simple approach...in order to get real utility with a controlled  organization of data, requires a special set of ideas and concepts. Unlocking the structure of serial flash is paramount before being able to take real advantage, of and to, the ease of density.

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For NOR the connections are parallel, ...meaning the physical connections for the read/write blocks are connected in a manner allowing access from two distinct addressed points of row and column allowing for a RANDOM access(just like RAM),  analogous to a spread sheet if you've ever worked with them.

The problem: For such a system, in order to orchestrate/manipulate a structure of data, simple concepts are available allowing for utility and organization. However, the problem lies in the density for the size of the array. For this, in order to gain more density, they have to increase the size of the array(erase block). Arrays of NOR are much greater in size than NAND....in order to allow for the column and  row access to data segments affording the utility. It's easier to devise an OS for this concept than it is for a serial process. However, there's a physical constraint.

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For the concepts of e.Digital...The ability of the MOS is constrained only by the ability of the flash. They can manage NAND and NOR utilizing their concepts. However,  it unlocks the serial process of NAND, having greater density, with a process of manufacture / development less involved than NOR.

Someone might present a question to RP...

It's noted that e.Digital prefers to utilize the serial process of NAND flash type memory. Does the MOS benefit  NAND flash,  by unlocking the serial process affording greater utility with a controlled organization of data, with an ease to density,  that may out pace the devlopments of NOR density ?

doni