This week, we’ve been working on wrapping up our 2004 FPGA market study. In looking over the data, we notice that (surprise, surprise) there is a massive migration underway toward low-cost, value-based FPGAs. This doesn’t mean that fewer people are designing in the high-end devices. Those are actually growing too, but the number of design starts (and finishes, for that matter) in the value-based segment is increasing rapidly.

Lattice Semiconductor raised their bid in that arena this week with their announcement of LatticeXP, a new non-volatile version of their groundbreaking EC family. Our first feature article looks at the new family in detail. If Lattice and Actel are right, non-volatility may be a key ingredient in the successful value-based FPGA. Only time and the market will tell us for sure.

Our second new article this week comes from AMI, and discusses the process of cost-reducing complex FPGAs by migrating to mask-programmed technology. It’s looking like the structured ASIC approach (yes, we know they are really gate-arrays wearing clever disguises) is getting traction in the market, and has some compelling benefits to offer as a gap-filler between FPGA and cell-based ASIC.

By the way, in a bout of blatant commercialism, I`ve been asked to mention that our 2004 FPGA market study will soon be for sale. For those of you who want all of the data right away with plenty of charts and graphs, it`s a valuable resource. You could try to get bits of it over the course of the next year by reading all of our articles, but that might be like getting a chess set one piece at a time through the mail. It`d be a long time before you`d have enough pieces to play with. If you`re interested in the survey, drop us an e-mail at info@fpgajournal.com. [end of commercial] And now back to our regularly scheduled programming…

Thanks for reading! If there`s anything we can do to make our publications more useful to you, please let us know at: comments@fpgajournal.com