RE: FPGA
Prior post: The power concern is important ,however, the highlight above is the question. Previously that logic was managed within DRAM, SDRAM,SRAM.....now it's managed within the flash.
The SRAM is now being utilized with a tiny foot print to pass the signals from the flash to the processor.
correction: The SRAM is now being utilized in/with a tiny foot print to pass the signals from the flash.
e.Digitals patents are of this nature.
If you're not utilizing the SRAM as the base for the logic, what does that make the flash in this case?
No wonder RP mentioned they had a cheaper method than Actel.
doni
