"According to Micron, the new SLC high-speed NAND can race up to 200MB/sec. for reading data and 100MB/sec. for writing data using the Open NAND Flash Interface working group's 2.0 standard and a four-plane architecture running greater clock speeds. For comparison, Lauer noted that traditional SLC-based NAND is restricted to achieving speeds of just 40MB/sec. to read data and up to 20MB/sec. to write data."

 Fits right in line with e.Digitals IP and efforts...especially the one that creates a primary memory out of a nonvolatile storage memory.

E.digital is only limited by the speed of a device, as they become faster, Edigs tech will shine.

 You are yet witnessing another change in e.Digitals direction.

With that, if you care to read...Intels Platform 2015...Evolution for the next Decade.

 "the advantages of higher clock speeds are in part negated by memory latency, since memory access times have not been able to keep pace with increasing clock frequencies."

"Therefore, performance will have to come by other means than boosting the clock speed of large monolithic cores."

 "Intel will design processors that allow dynamic reconfiguration of the cores, interconnects and caches to meet diverse and changing requirements."

"Microprocessors will need a sizable dose of integrated intelligence to coordinate all this complexity: " "One way to efficiently handle all this is through a built-in microkernel, relieving higher-level software of these complicated hardware management tasks."

"In other words, the processor itself must have the built-in intelligence to manage and make the best use of the underlying hardware."

 http://www.intel.com/technology/magazine/computing/Platform-2015-0305.pdf

 What is the future for Edig?

doni