Krueger
1. Petitioners Have Not Met Their Burden Of Showing A Reasonable Likelihood Of Success In Demonstrating That Krueger Discloses “creating the primary memory from a nonvolatile,long-term storage medium, wherein the primary memory comprises a plurality of blocks in which the data segments are to be stored.”
2. Krueger Does Not Disclose “writing a new data segment from the cache memory to the primary memory by linking said new data segment to a sequentially previous logical data segment.”……………………………………………………..48
3. Krueger Does Not Disclose “receiving the new data segment in the cache memory.”…………………………………………..49
4. Krueger does not disclose “moving the new data segment from the cache memory to a next available space within primary memory such that the new data segment is stored in primary memory in non-used memory space.”………………………..51
5. Krueger does not disclose “storing the data segments to primary memory in a manner consistent with an industry standard data storage format while retaining linking between data segments created in previous steps.”……………………………………52
None of the prior art sequences the data between the cache and the primary memory as Daberko/Davis do.. None of the prior art has the structure in whole to be able to sequence data between the cache and the primary memory.
I must say, I'm enjoying this, because the details are what I have been focused on for years ....the sequencing of data as in I/O...and how the data is managed through this sequencing.
This is the heart of optional shared processing for NUNCHI... e.Digital patented methods first to the NUNCHI platform based on this method....before the methods eventually will become a standard.
I'm not worried about the prior IP becoming standardized...I would just like to see e.Digital grab a bit, as it ventured these methods of moving and managing data.
doni
