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Message: RE: note....

RE: note....

posted on Mar 07, 2005 01:11PM
8.0 RCLK_OUT

Question: Is RCLK_OUT in-phase or out-of-phase with the SDCLKs?

Resolution: Since both the memory clock and RCLK_OUT are the core clock divided by two, it seems likely that they are predictably either in-phase or out-of-phase with each other. However, this is not specified and may be determined empirically.

as I read this Q&A.....it seems that the questions are very probing....lol

The only pins available to the end user are 26 or 27 for RCLK_OUT ....for fixed clock use....which now I decipher to be collective of 1/2 of the core clock.

for the DMA...clock to the sdram....they give nothing...this is the second half of the core clock.

DMA from what time frame ? how many years back ?...lol

DMA was top objective of Shaboom

enough for me....

doni

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