Published in the Official Gazette;
At last the.."890"

US 5,530,890 C1 (8052nd)
HIGH PERFORMANCE, LOW COST MICROPROCESSOR
Charles H. Moore, Woodside, Calif., and Russell H. Fish, III, Mt. View, Calif., assignors to Patriot Scientific Corporation, San Diego, Calif.
Reexamination Request No. 90/009,388, Jan. 16, 2009.
Reexamination Certificate for Patent 5,530,890, issued Jun. 25, 1996, Appl. No. 480,206, Jun. 7, 1995.
Division of application No. 07/389,334, filed on Aug. 3, 1989, now Pat. No. 5,440,749.
Int. Cl. G06F 15/76 (2006.01)
U.S. Cl. 712—32


AS A RESULT OF REEXAMINATION, IT HAS BEEN DETERMINED THAT:
The patentability of claims 5-10 is confirmed.
Claims 1-4 are cancelled.
New claims 11-20 are added and determined to be patentable.


11. A microprocessor, which comprises a main central processing unit and a separate direct memory access central processing unit in a single integrated circuit comprising said microprocessor, said main central processing unit having an arithmetic logic unit, a first push down stack with a top item register and a next item register, connected to provide inputs to said arithmetic logic unit, an output of said arithmetic logic unit being connected to said top item register, said top item register also being connected to provide inputs to an internal data bus, said internal data bus being bidirectionally connected to a loop counter, said loop counter being connected to a decrementer, said internal data bus being bidirectionally connected to a stack pointer, return stack pointer, mode register and instruction register, said stack pointer pointing into said first push down stack, said internal data bus being connected to a memory controller, to a Y register of a return push down stack, an X register and a program counter, said Y register, X register and program counter providing outputs to an internal address bus, said internal address bus providing inputs to said memory controller and to an incrementer, said incrementer being connected to said internal data bus, said direct memory access central processing unit providing inputs to said memory controller, said memory controller having an address/data bus and a plurality of control lines for connection to a random access memory.


Next to FALL is the "749"..
Several weeks for that to publish. IMO..

PS;
Still looking for that enigmatic,"148"..

Peace..

(Posted originally by earplug on IHUB)