Aiming to become the global leader in chip-scale photonic solutions by deploying Optical Interposer technology to enable the seamless integration of electronics and photonics for a broad range of vertical market applications

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Message: Re: Intel’s former chief architect on mores law

Well, as they say. Proof is in the puding. Prety sure our puding is still simmering to obtain that perfect creamy texture every one expects. I personaly like it when the top layer is a bit chewy after it cools. "if you have ever made home made puding"

Good chance no one has seen a test chip yet and the word that POET is for real confirmed by a whole bunch of scientists who were so amazed by the demonstration at thier lab simply could not keep thier mouths shut has not happened.

I like the fact that in the corporate presentation timeline MS5 & MS7 are still schedueled for 3rd Q 2013. This is reasuring and I am looking forward to seeing it.

MS5 Q3-2013

3/4 Terminal

Switching Laser

Demonstration

(POET Lab)

----------------------------

MS7 Q3-2013

Optical Thyristorbased Infrared

Detector Array

Fabrication and

Validation (3rd Party

Fab)

I find it interesting that they are chasing the 100nm scale. That is really really small! I believe I read some where that at 90nm silicon runs into issues of some thing it took allot of work to overcome. Cant remember what it was but well, this stuff is way over my head. (1mm = 1 000 000nm) that is friggen small!

And so here we sit, waiting to hear who will be interested in this break through technology that is nearly turn key in current fabs with standured lithography equipment.

Here is a question. Havent we been comercialy viable for nearely 6 months since MS4 came out?


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