No Steve, POET is not making 10/11nm transistors nor are they making them from Silicon. Something is wrong with the way this information is placed in the paragraph

One might think that a mistake may have been made on the size of POET transistors and he could have meant 100/110nm but that wouldn't pan out because he says Si (silicon) and we know POET's whole sucess is dependant on GaAs no Si.

If we were to take that sentence and place it in the paragraph in a position like I have done below it makes more sense because he seems to be talking about other semiconductor manufactures like Intel. At this point in the paragraph.

Read it this way and see if it makes more sense

POET’s view is that recently developed 3D silicon semiconductors stacking multiple chips and other silicon high-performance compound devices are very expensive to make and only offer moderate improvements over incumbent chips.The company’s final CMOS Si geometry at 10/11 nm is under development now and expected to go into production in 2015. One of the advantages POET presented about its process is that it can leverage existing CMOS chipmaking equipment, and it is fully compatible with existing semiconductor design and manufacturing flows. Taylor says POET’s benefits are analogous to the benefits of the first silicon integrated circuits, in that it eliminates connectors, solder joints, assembly, and multiple packaging steps while decreasing size, cost, complexity, and power. (Instead of here at the end of the paragraph)The company’s final CMOS Si geometry at 10/11 nm is under development now and expected to go into production in 2015.