Aiming to become the global leader in chip-scale photonic solutions by deploying Optical Interposer technology to enable the seamless integration of electronics and photonics for a broad range of vertical market applications

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Message: Chris Chu today
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As a refference for Harry:
http://en.wikipedia.org/wiki/Die_shrink

4 nodes better then 40nm corresponds to a FINFET 11nm.
But as I mentioned previously, I am sure this POET statetment of "4 nodes better in speed" is very conservative; they previously mentioned clock speeds of 40GHz (Si-CMOS is sticking at about 4GHz), and recently also a 5x speed advantage! Well, the future will tell us! First quarter of 2015?

Half-shrink

Main ITRS node | Stop gap half-node

250 nm 220 nm
180 nm 150 nm
130 nm 110 nm
90 nm 80 nm
65 nm 55 nm
45 nm 40 nm
32 nm 28 nm
22 nm 20 nm
14 nm 16 nm
10 nm 11 nm
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