BCD, I removed the "OT" from the title of my response, because this hacking attack in my humble opinion is quite on topic.

As the article in Ars Technica explains, certain bits in memory may change as a side effect of accessing different bits (DRAM cells) very frequently in a short period of time. It goes on explaining that this effect is a direct consequence of smaller node sizes:

• The vulnerability works only on newer types of DDR3 memory and is the result of the ever smaller dimensions of the silicon. With less space between each DRAM cell, it becomes increasingly hard to prevent one cell from interacting electrically with its neighbors.

Memory manufacturers can cope with that effect by adding checksum bits to the memory. These checksums make it possible to at least detect unwanted memory changes or – with some more checksum bits in place – even correct them. Quoting the article again:

• The attack doesn't work against newer DDR4 silicon or DIMMs that contain ECC, short for error correcting code, capabilities.

I am keen to seen the results of POET's work on their SRAM memory structures which are on the agenda for later this year.