Some other analysts have argued that 28nm is the low point for cost per transistor. In Dr. Caulfield’s slides he shows a pause in cost per transistor reduction at 20nm, he then shows that pause continuing at 14nm for other foundries but that at GlobalFoundries they see a “typical” cost per transistor reduction because of the high density of their 14nm process. Furthermore he is forecasting continued cost per transistor reductions at 10nm and 7nm in-line with our analysis.

GlobalFoundries view is that 28 nm will be a long lived node, 20nm will be a short lived node and 14nm will go on “forever”. 14nm offers “power, performance and cost” and many people are designing out of 28nm into 14nm skipping 20nm.

But there is a cost to these innovations, new materials and masks are rapidly piling up. For example there is a slide in the presentation showing approximately 40 masks at 65nm rising to approximately 57 masks at 28nm and approximately 68 masks at 16nm/14nm. This growth in process complexity drives up costs, reduces yields and increases cycle times. Dr. Caulfield noted that even at 1 day or 0.8 days per mask these processes take a long time to complete. The capital required for these processes are also increasing from around $65 million dollars per thousand wafers out at 65nm to around $100 million dollars for 28nm and around $135 million dollars at 16nm/14nm. The resulting improvements in transistor density are more than offsetting this so far, but the cost of entry is limiting the number of players at the leading edge (more on that below).

Design costs are also rapidly rising from approximately $60 million dollars at 65nm to around $140 million dollars at 28nm and nearly $500 million dollars at 16nm/14nm. Clearly only the highest running parts can provide a reasonable return on such a huge investment.

https://www.semiwiki.com/forum/content/4630-asmc-2015-globalfoundries-22nm-soi-plans-more.html