Re: Patent: METHOD OF FORMING AN HERMETIC SEAL ON ELECTRONIC AND OPTOELECTRONIC PACKAGES

Aiming to become the global leader in chip-scale photonic solutions by deploying Optical Interposer technology to enable the seamless integration of electronics and photonics for a broad range of vertical market applications

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norret

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Re: Patent: METHOD OF FORMING AN HERMETIC SEAL ON ELECTRONIC AND OPTOELECTRONIC PACKAGES

in response to

Re: Patent: METHOD OF FORMING AN HERMETIC SEAL ON ELECTRONIC AND OPTOELECTRONIC PACKAGES

fairchijisback

posted on Dec 01, 2019 10:17AM

John

In layman terms, If they connect a test device at the input point on the wafer, would it travel thru every Die on the wafer and finish at the output point, resulting in a positive continuity test and verifying each and every Die on the wafer in one test?

Also verifying how much loss of signal if any, and then proceeding to seperate all die on the wafer, to be installed in whatever package it would be used in, and tested to meet Prototype standards.