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Message: Macronix paves the way for 3-D flash
Macronix paves the way for 3-D flash
Mark LaPedus
EE Times
(06/15/2010 1:26 PM EDT)

SAN JOSE, Calif. -- At this week's 2010 Symposium on VLSI Circuits in Hawaii, Taiwan's Macronix International Co. Ltd. will provide an update on its flash memory technology to enable 3-D devices.

Macronix' technology, dubbed BE-SONOS, is a bandgap-engineered variation of the silicon-oxide-nitride-oxide-silicon formula. SONOS has been around for years and is seen as a better means for embedding flash than the typical floating-gate structure.

Using its BE-SONOS charge-trapping technology and a 3-D decoding architecture, Macronix has demonstrated the path to a scalable 3-D NAND flash device.

To enable this technology, there are several proposed structures, such as P-BiCS, TCAT, VSAT and VG. Macronix' work has shown that the VG--or vertical gate--architecture is the best approach. Simulation shows scalability to the 25-nm node, providing density far beyond conventional 2-D NAND flash, according to the Hsinchu-based chip maker.

In a paper, Macronix claims it has fabricated and demonstrated the functionality of an 8-layer, 75-nm half-pitch, 3-D VG NAND flash using a junction-free BE-SONOS scheme. ''At an equivalent 0.0014-micron2 cell size, Macronix’ 3-D VG NAND has shown no Z-directional interference, large read current, and a large program window (7V) (in) MLC operation -- a new milestone for next generation NAND flash,'' according to the company

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