In any event, Hedrick got his points across.

I understand, don't know if the court will. The defendants are trying to pigeonhole the 108 claim 1 terms down to a specific regiment of use, and they are not patented in that respect.

Like the term "cache memory"

e.Digitals consideration....plain an ordinary meaning

Defendants consideration...."memory strictly used to temporally store a block of read write data"

“”The term "cache memory" has a plain and ordinary meaning. (See Ex. E at 60 ("cache," "cache memory"); Ex. F at 68 ("cache").) Defendants seek to limit the term beyond its plain and ordinary meaning, but there is no basis in the intrinsic evidence for doing so. First, the claim teaches in pertinent part with respect to cache memory:

(b) coupling a cache memory to the primary memory, said cache memory providing temporary and volatile storage for at least one of the data segments;

(c) writing a new data segment from the cache memory to the primary memory by linking said new data segment to a sequentially previous logical data segment by the following steps:

(1) receiving the new data segment in the cache memory;

(2) moving the new data segment from the cache memory to a next available space within primary memory such that the new data segment is stored in primary memory in non-used memory space;

Thus, while temporary storage of data segments is a function of the cache memory, nothing in the language of the claim suggests that temporary storage must be the only function of the cache memory.

Second, Defendants propose the term to be construed as "memory strictly used to temporarily store a block of read/write data." (Emphasis added.) However, the claim does not teach using the cache memory to store "blocks" of read/write data. Rather it simply teaches using the cache memory to store "at least one of the data segments."While the specification of the '445 patent describes an embodiment in which the cache memory “is the size of at least one of the read/write blocks" (Ex. B ('445 patent) at 4:23-26), this does not suggest that the data segment must necessarily amount to a "block" of data.

For example, the cache memory could hold two data segments that collectively amount to less than a block's worth of data. Alternatively, the cache memory could be the size of 2 or 3 or more blocks of data, in which case, the cache memory could temporarily store more than one block of read/write data. All that this particular embodiment requires is that the cache memory be at least the size of one block. As a result, Defendants proposed construction should be rejected and the term should be accorded its plain and ordinary meaning.””

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I’ve always considered the cache to be variable and I have commented here in the past to that effect.

Defendants suggesting, “strictly used” makes no sense. ??

Perhpas they read here my recent post...spot a small cache and you got yourself a possible infringer....lol

Anyway, points well made for this issue.

doni