Computer registers -> main memory (ram) -> L(x) cache(s) -> IO devices

Rephrase...

Static memory(HDD) -> Computer registers(processor) -> main memory (ram) -> L(x) cache(s) -> IO devices

For e.Digital it's....

Static memory(flash/HDD/....etc)-> Micro controller->(x) cache(s) -> IO devices

The caches are not Level 1 or 2 paged from RAM which would be the norm.

Without a doubt....e.Digital has shortened the distance between Static memory and I/O.

doni