I may be wrong here (lord knows it happens often enough), but I think people are misunderstanding the brittleness comment. It's my understanding that it's not the final product (chip) that is less durable and more brittle than the Si version, but the wafers that are created for mass production of the chips. The whole wafer is more brittle, therefore causing more waste in the chip assembly process and fewer chips being produced.....something which the POET process has already solved, I think.

Someone correct me if this is wrong.

MC